PIC14000-04I/SS Microchip Technology, PIC14000-04I/SS Datasheet - Page 19
![IC, 8BIT MCU, PIC14, 4MHZ, SSOP-28](/photos/18/99/189938/3833516_sml.gif)
PIC14000-04I/SS
Manufacturer Part Number
PIC14000-04I/SS
Description
IC, 8BIT MCU, PIC14, 4MHZ, SSOP-28
Manufacturer
Microchip Technology
Datasheet
1.PIC14000-04SO.pdf
(153 pages)
Specifications of PIC14000-04I/SS
Controller Family/series
PIC14
No. Of I/o's
22
Ram Memory Size
192Byte
Cpu Speed
4MHz
No. Of Timers
2
Interface
I2C
Digital Ic Case Style
SSOP
Core Size
8 Bit
Program Memory Size
4096 X 14
Embedded Interface Type
I2C
Rohs Compliant
Yes
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Program Memory Type
EPROM
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
14 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.2.2.3
The INTCON Register is a readable and writable
register which contains the various enable and flag bits
for the Timer0 overflow and peripheral interrupts.
Figure 4-5 shows the bits for the INTCON register.
FIGURE 4-5:
1996 Microchip Technology Inc.
bit7
GIE
R/W
INTCON REGISTER
PEIE
R/W
INTCON REGISTER
T0IE
R/W
R/W
r
R/W
r
T0IF
R/W
R/W
r
R/W
Preliminary
r
bit0
T0IF: TMR0 overflow interrupt flag
1 = The TMR0 has overflowed
0 = TMR0 did not overflow
T0IE: TMR0 interrupt enable bit
1 = Enables T0IF interrupt
0 = Disables T0IF interrupt
PEIE: Peripheral interrupt enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
GIE: Global interrupt enable
1 = Enables all un-masked interrupts
0 = Disables all interrupts
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Register:
Address:
POR value: 0000 000xb
Must be cleared by software
Note:
0Bh or 8Bh
INTCON
The T0IF will be set by the specified
condition even if the corresponding Inter-
rupt Enable Bit is cleared (interrupt
disabled) or the GIE bit is cleared (all
interrupts
interrupt, clear the interrupt flag, to ensure
that the program does not immediately
branch to the peripheral interrupt service
routine
W:
R:
U:
disabled).
Writable
Readable
Unimplemented,
read as '0'
PIC14000
Before
DS40122B-page 19
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