PIC24HJ256GP210A-I/PF Microchip Technology, PIC24HJ256GP210A-I/PF Datasheet - Page 68

• Manufacturer Part Number: PIC24HJ256GP210A-I/PF
• Description: IC, 16BIT MCU, PIC24H, 40MIPS, TQFP-100
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ256GP210A-I/PF

• Controller Family/series: PIC24
• Ram Memory Size: 16KB
• Cpu Speed: 40MIPS
• No. Of Timers: 9
• Interface: I2C, LIN, SPI, UART
• No. Of Pwm Channels: 8
• Core Size: 16 Bit
• Program Memory Size: 256 KB
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Embedded Interface Type: I2C, LIN, SPI, UART
• Rohs Compliant: Yes
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 9
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 32 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24HJXXXGPX06A/X08A/X10A
REGISTER 6-1:
DS70592B-page 68
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
Note 1: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
TRAPR
R/W-0
R/W-0
EXTR
2: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
3: For PIC24HJ256GPX06A/X08A/X10A devices, this bit is unimplemented and reads back programmed
cause a device Reset.
SWDTEN bit setting.
value.
TRAPR: Trap Reset Flag bit
1 = A Trap Conflict Reset has occurred
0 = A Trap Conflict Reset has not occurred
IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1 = An illegal opcode detection, an illegal address mode or uninitialized W register used as an
0 = An illegal opcode or uninitialized W Reset has not occurred
Unimplemented: Read as ‘0’
VREGS: Voltage Regulator Standby During Sleep bit
1 = Voltage Regulator is active during Sleep mode
0 = Voltage Regulator goes into standby mode during Sleep
EXTR: External Reset (MCLR) Pin bit
1 = A Master Clear (pin) Reset has occurred
0 = A Master Clear (pin) Reset has not occurred
SWR: Software Reset (Instruction) Flag bit
1 = A RESET instruction has been executed
0 = A RESET instruction has not been executed
SWDTEN: Software Enable/Disable of WDT bit
1 = WDT is enabled
0 = WDT is disabled
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
SLEEP: Wake-up from Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
IDLE: Wake-up from Idle Flag bit
1 = Device was in Idle mode
0 = Device was not in Idle mode
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred
0 = A Brown-out Reset has not occurred
IOPUWR
R/W-0
R/W-0
SWR
Address Pointer caused a Reset
RCON: RESET CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
SWDTEN
R/W-0
U-0
—
(2)
WDTO
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLEEP
R/W-0
(2)
U-0
—
(1)
(3)
R/W-0
IDLE
U-0
—
 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-1
BOR
U-0
—
VREGS
R/W-0
R/W-1
POR
bit 8
bit 0
(3)