P87C51FA-4N NXP Semiconductors, P87C51FA-4N Datasheet - Page 6

IC, 8BIT MCU, 80C51, 16MHZ, DIP-40

P87C51FA-4N

Manufacturer Part Number
P87C51FA-4N
Description
IC, 8BIT MCU, 80C51, 16MHZ, DIP-40
Manufacturer
NXP Semiconductors
Datasheets

Specifications of P87C51FA-4N

Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
256Byte
Cpu Speed
16MHz
No. Of Timers
4
No. Of Pwm Channels
5
Core Size
8 Bit
Program Memory Size
8KB
Package
40PDIP
Device Core
80C51
Family Name
87C
Maximum Speed
16 MHz
Ram Size
256 Byte
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
32
Interface Type
UART
Operating Temperature
0 to 70 °C
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C51FA-4N
Manufacturer:
XICOR
Quantity:
101
Philips Semiconductors
PIN DESCRIPTIONS
NOTE:
To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher than V
2000 Jan 20
V
V
P0.0–0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
RST
ALE/PROG
PSEN
EA/V
XTAL1
XTAL2
MNEMONIC
SS
CC
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
PP
39–32 43–36
21–28 24–31
10–17
DIP
1–8
20
40
10
11
12
13
14
15
16
17
30
29
31
19
18
1
2
9
PIN NUMBER
13–19
LCC
2–9
11,
22
44
13
14
15
16
17
18
19
10
33
32
35
21
20
11
2
3
40–44,
37–30
18–25
7–13
QFP
1–3
16
38
40
41
10
11
12
13
27
26
29
15
14
5,
5
7
8
9
4
TYPE NAME AND FUNCTION
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Ground: 0V reference.
Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the
code bytes during program verification and received code bytes during EPROM
programming. External pull-ups are required during program verification.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 1 pins that are externally pulled low will source current because of the internal pull-ups.
(See DC Electrical Characteristics: I
during program memory verification. Alternate functions for Port 1 include:
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOV @Ri), port 2 emits the contents of the P2 special function register. Some Port 2 pins
receive the high order address bits during EPROM programming and verification.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups.
(See DC Electrical Characteristics: I
family, as listed below:
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
capacitor to V
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming. ALE can be disabled by
setting SFR auxiliary.0. With this bit set, ALE will be active only during a MOVX instruction.
Program Store Enable: The read strobe to external program memory. When the 8XC51/31
is executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to
external data memory. PSEN is not activated during fetches from internal program memory.
External Access Enable/Programming Supply Voltage: EA must be externally held low
to enable the device to fetch code from external program memory locations 0000H and
0FFFH. If EA is held high, the device executes from internal program memory unless the
program counter contains an address greater than 0FFFH. This pin also receives the
12.75V programming supply voltage (V
programmed, EA will be internally latched on Reset.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
Crystal 2: Output from the inverting oscillator amplifier.
T2 (P1.0): Timer/Counter 2 external count input/clockout (see Programmable Clock-Out).
T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction control.
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt
INT1 (P3.3): External interrupt
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
Back
CC
.
6
Next
IL
IL
). Port 1 also receives the low-order address byte
). Port 3 also serves the special features of the 80C51
PP
SS
) during EPROM programming. If security bit 1 is
permits a power-on reset using only an external
IL
). Port 2 emits the high-order address byte
CC
+ 0.5V or V
80C51/87C51/80C31
SS
– 0.5V, respectively.
Product specification

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