PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 135
PIC24FJ64GB004-I/ML
Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(48 pages)
2.PIC24FJ32GB002-ISO.pdf
(352 pages)
3.PIC24FJ32GB002-ISO.pdf
(12 pages)
4.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB004-I/ML
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GB002-ISO PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- Current page: 135 of 352
- Download datasheet (3Mb)
10.4.6
The PIC24FJ64GB004 family of devices implements a
total of 27 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (14)
• Output Remappable Peripheral Registers (13)
REGISTER 10-1:
REGISTER 10-2:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4-0
U-0
U-0
U-0
U-0
—
—
—
—
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INT1) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 2 (INT2) to Corresponding RPn or RPIn Pin bits
U-0
U-0
U-0
U-0
—
—
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
U-0
—
—
—
—
INT1R4
INT2R4
R/W-1
R/W-1
U-0
U-0
PIC24FJ64GB004 FAMILY
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT1R3
INT2R3
R/W-1
R/W-1
U-0
U-0
—
—
Note:
Input and output register values can only be
changed if IOLOCK (OSCCON<6>) = 0.
See Section 10.4.4.1 “Control Register
Lock” for a specific command sequence.
INT1R2
INT2R2
R/W-1
R/W-1
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
INT1R1
INT2R1
R/W-1
R/W-1
U-0
U-0
—
—
DS39940D-page 135
INT1R0
INT2R0
R/W-1
R/W-1
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0
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