AT91SAM7S32B-AU-001 Atmel, AT91SAM7S32B-AU-001 Datasheet - Page 17

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AT91SAM7S32B-AU-001

Manufacturer Part Number
AT91SAM7S32B-AU-001
Description
8-Bit Microcontrollers
Manufacturer
Atmel
Datasheet

Specifications of AT91SAM7S32B-AU-001

Termination Type
SMD
Interface
I2C, SPI, UART
Embedded Interface Type
I2C, SPI, UART
Supply Voltage Max
3.6V
No. Of Adc Inputs
8
Flash Memory Size
32KB
No. Of I/o Pins
21
Core Size
32 Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.4
6175IS–ATARM–30-Aug-10
Peripheral DMA Controller
• Handles data transfer between peripherals and memories
• Eleven channels: AT91SAM7S512/256/128/64/321/161
• Nine channels: AT91SAM7S32/16
• Low bus arbitration overhead
• Next Pointer management for reducing interrupt latency requirements
• Peripheral DMA Controller (PDC) priority is as follows (from the highest priority to the lowest):
– Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the required
– Key-protected program, erase and lock/unlock sequencer
– Single command for erasing, programming and locking operations
– Interrupt generation in case of forbidden operation
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Synchronous Controller
– Two for the Serial Peripheral Interface
– One for the Analog-to-digital Converter
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
wait states
Receive
Receive
Receive
Receive
Receive
Receive
Transmit
Transmit
Transmit
Transmit
Transmit
AT91SAM7S Series Summary
DBGU
USART0
USART1
SSC
ADC
SPI
DBGU
USART0
USART1
SSC
SPI
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