IS61LV5128AL-10TLI INTEGRATED SILICON SOLUTION (ISSI), IS61LV5128AL-10TLI Datasheet - Page 8
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IS61LV5128AL-10TLI
Manufacturer Part Number
IS61LV5128AL-10TLI
Description
IC, SRAM, 4MBIT, 10NS, TSOP-2-44
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet
1.IS61LV5128AL-10TLI.pdf
(13 pages)
Specifications of IS61LV5128AL-10TLI
Memory Size
4Mbit
Memory Configuration
512K X 8
Access Time
10ns
Supply Voltage Range
3.135V To 3.6V
Memory Case Style
TSOP-2
No. Of Pins
44
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS61LV5128AL-10TLI
Manufacturer:
ISSI
Quantity:
1 000
Company:
Part Number:
IS61LV5128AL-10TLI
Manufacturer:
ISSI
Quantity:
1 657
Company:
Part Number:
IS61LV5128AL-10TLI
Manufacturer:
ISSI
Quantity:
70
Part Number:
IS61LV5128AL-10TLI
Manufacturer:
ISSI
Quantity:
20 000
WRITE CYCLE NO. 3
IS61LV5128AL
WRITE CYCLE NO. 2
8
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but
2. I/O will assume the High-Z state if OE > V
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of
the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
OUT
OUT
WE
WE
D
D
OE
OE
CE
CE
IN
IN
LOW
LOW
LOW
t
SA
(1,2)
(WE Controlled: OE is LOW During Write Cycle)
t
DATA UNDEFINED
DATA UNDEFINED
SA
(WE Controlled: OE is HIGH During Write Cycle)
IH
.
Integrated Silicon Solution, Inc. — www.issi.com —
VALID ADDRESS
t
t
t
t
AW
AW
HZWE
HZWE
VALID ADDRESS
t
t
PWE1
WC
t
t
PWE2
WC
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
HD
t
t
LZWE
LZWE
t
t
HA
HA
CE_WR2.eps
ISSI
CE_WR3.eps
1-800-379-4774
04/15/05
Rev. C
®