SST25VF040B-80-4I-SAE SILICON STORAGE TECHNOLOGY, SST25VF040B-80-4I-SAE Datasheet - Page 18

• Manufacturer Part Number: SST25VF040B-80-4I-SAE
• Description: MEMORY, FLASH, 4MBIT, SPI, 8SOIC
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST25VF040B-80-4I-SAE

• Memory Size: 4Mbit
• Clock Frequency: 80MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Memory Type: Flash
• Memory Configuration: 512K X 8
• Interface Type: Serial, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
Write-Enable (WREN)
Write-Disable (WRDI)
The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to 1 allow-
ing Write operations to occur. The WREN instruction must be executed prior to any Write (Program/
Erase) operation. The WREN instruction may also be used to allow execution of the Write-Status-Reg-
ister (WRSR) instruction; however, the Write-Enable-Latch bit in the Status Register will be cleared
upon the rising edge CE# of the WRSR instruction. CE# must be driven high before the WREN instruc-
tion is executed.
Figure 17:Write Enable (WREN) Sequence
The Write-Disable (WRDI) instruction resets the Write-Enable-Latch bit and AAI bit to 0 disabling any
new Write operations from occurring. The WRDI instruction will not terminate any programming opera-
tion in progress. Any program operation in progress may continue up to T
instruction. CE# must be driven high before the WRDI instruction is executed.
Figure 18:Write Disable (WRDI) Sequence
SCK
CE#
SCK
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
18
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
MSB
0 1 2 3 4 5 6 7
04
06
1295 WREN.0
1295 WRDI.0
4 Mbit SPI Serial Flash
BP
after executing the WRDI
SST25VF040B
S71295-06-000
Data Sheet
02/11