A25L016M-F AMIC, A25L016M-F Datasheet - Page 19

IC, SM, FLASH, 16MB, SPI, TOP BOOT

A25L016M-F

Manufacturer Part Number
A25L016M-F
Description
IC, SM, FLASH, 16MB, SPI, TOP BOOT
Manufacturer
AMIC
Datasheet

Specifications of A25L016M-F

Memory Size
16Mbit
Clock Frequency
100MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOP
No. Of Pins
8
Base Number
25L016
Frequency
100MHz
Interface
Serial, SPI
Package / Case
SOP
Memory Type
Uniform Sector Flash
Memory Configuration
2M X 8
Interface Type
Serial, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A25L016M-F
Manufacturer:
MOT
Quantity:
3 290
Part Number:
A25L016M-F
Manufacturer:
AMIC
Quantity:
20 000
Company:
Part Number:
A25L016M-F
Quantity:
555
Fast Read Dual Input-Output (BBh)
The Fast Read Dual Input-Output (BBh) instruction is similar
to the Fast_Read (0Bh) instruction except the data is input
and output on two pins, DO and DIO, instead of just DO. This
allows data to be transferred from the A25L016 at twice the
rate of standard SPI devices.
Similar to the Fast Read instruction, the Fast Read Dual
Output instruction can operate at the highest possible
frequency
Figure 11. FAST_READ_DUAL_INPUT-OUTPUT Instruction Sequence and Data-Out Sequence
(October, 2010, Version 1.4)
of
DIO
DIO
DO
DO
S
S
C
C
f
C
(See
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
3 2 1 0
High Impedance
Dummy
0 1
Byte
AC
Note:. Address bits A23 to A21 are Don’t Care, for A25L016
Characteristics).
2 3 4
Instruction
7 5 3 1
6 4 2 0
MSB
DIO switches from input to output
Data Out 1
5 6
7
MSB
6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
This
7 5 3 1 7 5 3
MSB
22 20 18
23
8
Data Out 2
21 19
9
is
24-Bit Address
10
18
accomplished by adding four “dummy” clocks after the 24-bit
address as shown in figure 11. The dummy clocks allow the
device’s internal circuits additional time for setting up the
initial address. The input data during the dummy clocks is
“don’t care”. However, the DIO and DO pins should be
high-impedance prior to the falling edge of the first data out
clock.
7
6 4 2
16 17 18 19
Data Out 3
5 3
1
0
0
1
MSB
7 5 3 1 7 5 3 1
Data Out 4
.
AMIC Technology Corp.
Data Out 5
A25L016 Series
MSB
7

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