25LC1024-I/SN Microchip Technology, 25LC1024-I/SN Datasheet

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... PDIP and SOIC, and advanced 8-lead DFN package. Pb-free (Pure Sn) finish is also available. Package Types (not to scale) DFN (MF SPI is a registered trademark of Motorola Semiconductor. *25XX1024 is used in this document as a generic part number for the 25AA1024, 25LC1024 devices. Preliminary Packages P, SM SM, MF PDIP/SOIC (P, SM HOLD ...

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... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V CC .............................................................................................................................................................................6.5V All inputs and outputs w.r. ......................................................................................................... -0. Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C ESD protection on all pins ..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...

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... This parameter is not tested but established by characterization and qualification. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from our web site. 3: Includes T HI time.  2003 Microchip Technology Inc. 25AA1024/25LC1024 Industrial (I -40°C to +85°C Automotive (E -40° ...

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... TABLE 1-2: (CONTINUED) AC CHARACTERISTICS AC CHARACTERISTICS Param. Sym Characteristic No. 18 Thz HOLD low to output High-Z 19 Thv HOLD high to output valid 20 Trel CS High to Standby mode 21 Tpd CS High to Deep power- down 22 Tce Chip erase cycle time 23 Tse Sector erase cycle time 24 Twc Internal write cycle time 25 — ...

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... SI HOLD FIGURE 1-2: SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI  2003 Microchip Technology Inc. 25AA1024/25LC1024 high-impedance n don’t care high-impedance 14 don’t care Preliminary LSB in ...

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... FUNCTIONAL DESCRIPTION 2.1 Principles of Operation The 25XX1024 is a 131,072 byte Serial Flash designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PICMicro lers. It may also interface with microcontrollers that do ...

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... high-impedance SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 HV Generator EEPROM Array Page Latches Y Decoder Sense Amp. R/W Control Read data from memory array beginning at selected address Write data to memory array beginning at selected address Set the write enable latch (enable write operations) Reset the write enable latch (disable write operations) ...

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... FIGURE 2-2: BYTE WRITE SEQUENCE SCK instruction high-impedance SO FIGURE 2-3: PAGE WRITE SEQUENCE SCK instruction SCK data byte DS21836A-page 24-bit address 24-bit address data byte Preliminary Twc data byte data byte data byte n (256 max  2003 Microchip Technology Inc. ...

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... FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI) CS SCK SI SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 The following is a list of conditions under which the write enable latch will be reset: • Power-up See • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed ...

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... Read Status Register Instruction (RDSR) The Read Status Register instruction (RDSR) provides access to the Status Register. The Status Register may be read at any time, even during a write cycle. The Status Register is formatted as follows: TABLE 2-2: STATUS REGISTER W/R – – ...

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... SI SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 The Write-Protect Enable (WPEN) bit is a nonvolatile bit that is available as an enable bit for the WP pin. The Write-Protect (WP) pin and the Write-Protect Enable (WPEN) bit in the Status Register control the programmable hardware write-protect feature. Hard- ware write protection is enabled when WP pin is low and the WPEN bit is high ...

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... Data Protection The following protection has been implemented to prevent inadvertent writes to the array: • The write enable latch is reset on power-up • A write enable instruction must be issued to set the write enable latch • After a byte write, page write or Status Register write, the write enable latch is reset • ...

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... SI SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 CS must then be driven high after the last bit if the address or the Page Erase will not execute. Once the CS is driven high the self-timed Page Erase cycle is started. The WIP bit in the Status Register can be read to determine when the Page Erase cycle is complete ...

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... SECTOR ERASE The Sector Erase function will erase all bits (FFh) inside the given sector. A Write Enable (WREN) instruc- tion must be given prior to attempting a Sector Erase. This is done by setting CS low and then clocking out the proper instruction into the 25XX1024. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...

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... SCK SI SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 The CS pin must be driven high after the eighth bit of the instruction code has been given or the Chip Erase function will not be executed. Once the CS pin is driven high the self-timed Chip Erase function begins. ...

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... DEEP POWER-DOWN MODE Deep Power-down Mode of the 25XX1024 is its lowest power consumption state. The device will not respond to any of the read or write commands while in Deep Power-down mode, and therefore it can be used as an additional software write protection feature. The Deep Power-down mode is entered by driving CS low, followed by the instruction code (Figure 2-11) onto the SI line, followed by driving CS high ...

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... SO  2003 Microchip Technology Inc. 25AA1024/25LC1024 Release from Deep Power-down mode and Read Electronic Signature is entered by driving CS low, followed by the RDID instruction code (Figure 2-12) and then a dummy address of 24 bits (A23-A0). After the last bit of the dummy address is clock in, the 8-bit Electronic signature is clocked out on the SO pin ...

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... PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Name Pin Number Function CS 1 Chip Select Input SO 2 Serial Data Output WP 3 Write-Protect Pin Ground SI 5 Serial Data Input SCK 6 Serial Clock Input ...

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... Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: Custom marking available.  2003 Microchip Technology Inc. 25AA1024/25LC1024 : Example 5LC1024 I/MF 0328 1L7 Example: 25AA1024 I/P 1L7 0328 Example: 25LC1024 I/SN 0328 1L7 Preliminary DS21836A-page 19 ...

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... Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN- TOP VIEW α A1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Base Thickness Overall Length Molded Package Length Exposed Pad Length Overall Width Molded Package Width Exposed Pad Width ...

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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018  2003 Microchip Technology Inc. 25AA1024/25LC1024 Units ...

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... Plastic Small Outline (SM) – Medium, 208 mil (SOIC β Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...

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... Conferences for products, Development Systems, technical information and more • Listing of seminars and events  2003 Microchip Technology Inc. 25AA1024/25LC1024 SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...

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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 25AA1024/25LC1024 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

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... Mbit, 1.8V Serial Flash, Industrial temp., Tape & Reel, DFN package 25LC1024-I/SMG = 1 Mbit, 2.5V Serial Flash, Industrial temp., SOIC package, Pb-free 25LC1024-I Mbit, 2.5V Serial Flash, Industrial temp., P-DIP package 25LC1024T-E/ Mbit, 2.5V Serial Flash, Extended temp., Tape & Reel, DFN package DS21836A-page 25 ...

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... NOTES: DS21836A-page 26 Preliminary  2003 Microchip Technology Inc. ...

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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...

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... Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Biesbosch 14 NL-5152 SC Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/28/03  2003 Microchip Technology Inc. ...