IS43R16160B-6TL INTEGRATED SILICON SOLUTION (ISSI), IS43R16160B-6TL Datasheet - Page 25

• Manufacturer Part Number: IS43R16160B-6TL
• Description: SDRAM, DDR, 16M X 16, 2.5V, 66TSOP2
• Manufacturer: INTEGRATED SILICON SOLUTION (ISSI)

Specifications of IS43R16160B-6TL

• Access Time: 0.7ns
• Page Size: 256Mbit
• Memory Case Style: TSOP-2
• No. Of Pins: 66
• Operating Temperature Range: 0°C To +70°C
• Memory Type: DRAM - Synchronous
• Memory Configuration: 4 BLK (4M X 16)
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS43R83200B
IS43R16160B, IC43R16160B
Integrated Silicon Solution, Inc.
Rev. B
DDR SDRAM (Rev.1.1)
10/31/08
READ
after the /CAS Latency from the READ, followed by (BL-1) consecutive data when the Burst Length
is BL. The start address is specified by A0-9(x8)/A0-8(x16), and the address sequence of burst data
is defined by the Burst Type. A READ command may be applied to any active bank, so the row
precharge time (tRP) can be hidden behind continuous output data by interleaving the multiple banks.
When A10 is high at a READ command, the auto-precharge (READA) is performed. Any
command(READ,WRITE,PRE,ACT) to the same bank is inhibited till the internal precharge is
complete. The internal precharge starts at BL/2 after READA. The next ACT command can be
issued after (BL/2+tRP) from the previous READA.
After tRCD from the bank activation, a READ command can be issued. 1st Output data is available
A0-9,11,12
Command
BA0,1
/CLK
DQS
CLK
A10
DQ
ACT
Xa
Xa
00
Preliminary
Preliminary
tRCD
Multi Bank Interleaving READ (BL=8, CL=2)
READ
00
Y
0
/CAS latency
ACT
Xb
Xb
10
Qa0
Qa1
256M Double Data Rate Synchronous DRAM
Qa2
Burst Length
READ
Qa3
Y
0
10
Qa4
Qa5
PRE
00
0
Qa6
Zentel Electronics Corporation
Qa7
Qb0
A3S56D30/40ETP
Qb1
Qb2 Qb3
Qb4
Qb5
Qb7
Qb8
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