EPM7256AEQC208-7N Altera, EPM7256AEQC208-7N Datasheet - Page 3
![IC PLD EEPROM 256 MACROCELL 7.5NS QFP208](/photos/19/4/190423/4732026_sml.jpg)
EPM7256AEQC208-7N
Manufacturer Part Number
EPM7256AEQC208-7N
Description
IC PLD EEPROM 256 MACROCELL 7.5NS QFP208
Manufacturer
Altera
Series
MAX 7000AEr
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AEQC208-7N
Cpld Type
EEPROM
No. Of Macrocells
256
No. Of I/o's
164
Propagation Delay
7.5ns
Global Clock Setup Time
3.9ns
Frequency
172.4MHz
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7256AEQC208-7N
Manufacturer:
ALTERA
Quantity:
25
Part Number:
EPM7256AEQC208-7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
General
Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-
performance devices based on Altera’s second-generation MAX
architecture. Fabricated with advanced CMOS technology, the EEPROM-
based MAX 7000A devices operate with a 3.3-V supply voltage and
provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns,
and counter speeds of up to 227.3 MHz. MAX 7000A devices in the -4, -5,
-6, -7, and some -10 speed grades are compatible with the timing
requirements for 33 MHz operation of the PCI Special Interest Group (PCI
SIG) PCI Local Bus Specification, Revision 2.2. See
Table 2. MAX 7000A Speed Grades
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
Software design support and automatic place-and-route provided by
Altera’s development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, Synplicity, and VeriBest
Programming support with Altera’s Master Programming Unit
(MPU), MasterBlaster
communications cable, ByteBlasterMV
cable, and BitBlaster
programming hardware from third-party manufacturers and any
Jam
Format File- (.svf) capable in-circuit tester
Device
TM
STAPL File (.jam), Jam Byte-Code File (.jbc), or Serial Vector
v
v
-4
MAX 7000A Programmable Logic Device Data Sheet
TM
TM
serial download cable, as well as
v
v
serial/universal serial bus (USB)
-5
v
v
Speed Grade
-6
TM
parallel port download
v
v
v
v
v
v
v
-7
Table
-10
v
v
v
v
v
v
v
2.
-12
v
v
v
3