5M240ZT100C5N Altera, 5M240ZT100C5N Datasheet - Page 137

no-image

5M240ZT100C5N

Manufacturer Part Number
5M240ZT100C5N
Description
IC CPLD FLASH, 192, 7.5NS, 118.3MHZ, TQFP-100
Manufacturer
Altera
Series
MAX Vr

Specifications of 5M240ZT100C5N

Cpld Type
FLASH
No. Of Macrocells
192
No. Of I/o's
79
Propagation Delay
7.5ns
Global Clock Setup Time
4.6ns
Frequency
118.3MHz
Supply Voltage Range
1.71V To 1.89V
Rohs Compliant
Yes
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
240
Number Of Macrocells
192
Number Of Gates
-
Number Of I /o
79
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA45
Quantity:
895
Part Number:
5M240ZT100C5N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA
0
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
5M240ZT100C5N
0
Part Number:
5M240ZT100C5N+CODE
Manufacturer:
ALTERA
0
Chapter 7: User Flash Memory in MAX V Devices
Software Support for UFM Block
Table 7–14. SPI Timing Parameters for Extended Mode
January 2011 Altera Corporation
t
t
t
SCK2NCS
HNCSHIGH
NCS2SCK
Symbol
The time required for the SCK signal falling edge to nCS signal rising edge
The time that the nCS signal must be held high
The time required for the nCS signal falling edge to SCK signal rising edge
1
ALTUFM SPI Timing Specification
Figure 7–32
(read/write). These nCS timing specifications do not apply to the SPI Extended
read-only mode nor to any of the SPI Base modes. However, for the SPI Extended
mode (read only) and the SPI Base mode (both read only and read/write), the nCS
signal and SCK are not allowed to toggle at the same time.
parameters that only apply to the SPI Extended mode (read/write).
Figure 7–32. SPI Timing Waveform
Instantiating SPI Using Quartus II ALTUFM_SPI Megafunction
Figure 7–33
Quartus II software.
Figure 7–33. ALTUFM_SPI Megafunction Symbol for SPI Instantiation
ALTUFM_SPI megafunction is under the Memory Compiler folder on page 2a of the
MegaWizard Plug-In Manager. On page 3, you can choose whether to implement the
Read/Write or Read Only mode as the access mode for the UFM. You can also select
the configuration mode (Base or Extended) for SPI on this page. You can specify the
initial content of the UFM block on page of the ALTUFM MegaWizard Plug-In
Manager as discussed in
The UFM block’s internal oscillator is always running when the ALTUFM_SPI
megafunction is instantiated for read/write interface. The UFM block’s internal
oscillator is disabled when the ALTUFM_SPI megafunction is instantiated for read
only interface.
nCS
SCK
shows the timing specification needed for the SPI Extended mode
shows the ALTUFM_SPI megafunction symbol for SPI instantiation in the
Description
t
SCK2NCS
t
“Creating Memory Content File” on page
HNCSHIGH
t
NCS2SCK
Minimum (ns)
Table 7–14
600
750
50
7–39.
MAX V Device Handbook
lists the timing
Maximum (ns)
7–35

Related parts for 5M240ZT100C5N