LFE2M50E-6FN484C LATTICE SEMICONDUCTOR, LFE2M50E-6FN484C Datasheet - Page 81
LFE2M50E-6FN484C
Manufacturer Part Number
LFE2M50E-6FN484C
Description
IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-484
Manufacturer
LATTICE SEMICONDUCTOR
Series
LatticeECP2Mr
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M50E-6FN484C
No. Of Logic Blocks
48000
No. Of Macrocells
24000
No. Of Speed Grades
6
No. Of I/o's
270
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Total Ram Bits
4147Kbit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15
Company:
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Lattice Semiconductor Corporation
Quantity:
10 000
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20 000
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LFE2M50E-6FN484C-5I
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LATTICE
Quantity:
3
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Timing Diagrams
Figure 3-9. Read/Write Mode (Normal)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-10. Read/Write Mode with Input and Output Registers
CLKA
DOA (Regs)
WEA
DOA
CSA
ADA
DIA
CLKA
WEA
ADA
CSA
DIA
t
SU
A0
D0
t
t
H
SU
A0
D0
t
H
Mem(n) data from previous read
A1
D1
A1
D1
3-30
output is only updated during a read cycle
A0
t
A0
CO_EBR
t
COO_EBR
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
D0
A1
A1
t
CO_EBR
D0
D1
A0
A0
t
CO_EBR
t
COO_EBR
D1
D0
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