LFE2M50E-5FN900C LATTICE SEMICONDUCTOR, LFE2M50E-5FN900C Datasheet - Page 96
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LFE2M50E-5FN900C
Manufacturer Part Number
LFE2M50E-5FN900C
Description
IC, LATTICEECP2M FPGA, 420MHZ, FPBGA-900
Manufacturer
LATTICE SEMICONDUCTOR
Series
LatticeECP2Mr
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2M50E-5FN900C
No. Of Logic Blocks
48000
No. Of Macrocells
24000
No. Of Speed Grades
5
No. Of I/o's
410
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Total Ram Bits
4147Kbit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M50E-5FN900C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeECP2/M sysCONFIG Port Timing Specifications (Continued)
Lattice Semiconductor
Figure 3-14. sysCONFIG Parallel Port Read Cycle
Figure 3-15. sysCONFIG Parallel Port Write Cycle
t
t
Timing v.A 0.11
Master Clock Frequency
Duty Cycle
Timing v.A 0.11
SUSPI
HSPI
Parameter
Parameter
WRITEN
WRITEN
SOSPI Data Setup Time Before CCLK
SOSPI Data Hold Time After CCLK
CCLK
CS1N
BUSY
D[0:7]
*n = last byte of read cycle.
CCLK
CS1N
BUSY
D[0:7]
*n = last byte of write cycle.
CSN
CSN
Selected value - 30%
Over Recommended Operating Conditions
t
SUCBDI
Min.
40
t
t
t
t
Description
SUWD
SUCS
SUWD
SUCS
Byte 0
Byte 0
t
t
BSCL
BSCL
3-45
Byte 1
Byte 1
t
t
CORD
HCBDI
Selected value + 30%
Byte 2
Max.
t
t
60
DCB
DCB
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
t
Byte 2
BSCYC
t
t
BSCH
BSCH
Byte n*
Byte n*
t
Min.
HCS
t
t
t
7
2
HCS
HWD
HWD
Units
MHz
Max.
%
—
—
Units
ns
ns
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