ISP1507BBS ST-Ericsson Inc, ISP1507BBS Datasheet - Page 57
![IC, TRANSCEIVER, USB OTG, 32HVQFN](/photos/19/0/190010/42557130_sml.jpg)
ISP1507BBS
Manufacturer Part Number
ISP1507BBS
Description
IC, TRANSCEIVER, USB OTG, 32HVQFN
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1507BBS.pdf
(81 pages)
Specifications of ISP1507BBS
Usb Type
USB Transceiver
Usb Version
2.0
Data Rate
12Mbps
No. Of Ports
1
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1507BBSTM
Manufacturer:
SEMIKRON
Quantity:
22
Table 42.
Table 43.
CD00222689
Product data sheet
Bit
Symbol
Reset
Access
Bit
7 to 4
3
2
1 to 0
Symbol
-
BVALID_FALL
BVALID_RISE
-
PWR_CTRL - Power Control register (address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit allocation
PWR_CTRL - Power Control register (address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit description
10.1.13 Vendor-specific registers
10.1.14 PWR_CTRL register
R/W/S/C
10.2 Extended register set
7
0
Addresses 30h to 3Fh contain vendor-specific registers.
This register controls various aspects of the ISP1507. See
Addresses 00h to 3Fh of the extended register set directly map to the immediate set. This
means a read, write, set or clear operation to these extended addresses will operate on
the immediate register set.
Addresses 40h to FFh are not implemented. Operating on these addresses may result in
undefined behavior of the PHY.
Description
reserved; the link must never write logic 1 to these bits.
BVALID Fall: Enables RXCMDs for HIGH-to-LOW transitions on BVALID. When BVALID
changes from HIGH to LOW, the ISP1507 will send an RXCMD to the link with the ALT_INT bit
set to logic 1.
This bit is optional and is not necessary for OTG devices. This bit is provided for debugging
purposes. The session valid comparator should be used instead.
BVALID Rise: Enables RXCMDs for LOW-to-HIGH transitions on BVALID. When BVALID
changes from LOW to HIGH, the ISP1507 will send an RXCMD to the link with the ALT_INT bit
set to logic 1.
This bit is optional and is not necessary for OTG devices. This bit is provided for debugging
purposes. The session valid comparator should be used instead.
reserved; the link must never write logic 1 to these bits.
R/W/S/C
6
0
reserved
R/W/S/C
5
0
Rev. 04 — 20 May 2010
R/W/S/C
4
0
BVALID_
R/W/S/C
FALL
3
0
ISP1507A; ISP1507B
BVALID_
R/W/S/C
RISE
ULPI HS USB OTG transceiver
2
0
Table
42.
R/W/S/C
© ST-ERICSSON 2010. All rights reserved.
1
0
reserved
R/W/S/C
0
0
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