LTC4069EDC-4.4#TRM Linear Technology, LTC4069EDC-4.4#TRM Datasheet - Page 15

• Manufacturer Part Number: LTC4069EDC-4.4#TRM
• Description: BATT CHARGER, LI ON, 750MA, 6DFN
• Manufacturer: Linear Technology

Specifications of LTC4069EDC-4.4#TRM

• Battery Type: Li-Ion
• Input Voltage: 5.5V
• Battery Charge Voltage: 4.4V
• Charge Current Max: 750mA
• Battery Ic Case Style: DFN
• No. Of Pins: 6
• No. Of Series Cells: 1
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
NTC Trip Point Error
When a 1% resistor is used for R
in the 40°C trip point is determined by the tolerance
of the NTC thermistor. A typical 100k NTC thermistor
has ±10% tolerance. By looking up the temperature
coeffi cient of the thermistor at 40°C, the tolerance error
can be calculated in degrees centigrade. Consider the
Vishay NTHS0603N01N1003J thermistor, which has a
temperature coeffi cient of –4%/°C at 40°C. Dividing the
tolerance by the temperature coeffi cient, ±5%/(4%/°C) =
±1.25°C, gives the temperature error of the hot trip point.
PACKAGE DESCRIPTION
R
R
2.50 ±0.05
NOM
1
=
1.15 ±0.05
=
= 604
10
=
8 8 8 87
3 266 0 5325
k
R
. , .
.
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
•
COLD
k
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
⎛
⎝ ⎜
TOP AND BOTTOM OF PACKAGE
Ω
0.61 ±0.05
(2 SIDES)
3 26
,
.
−
604
−
0 5325
R
.
6 6 0 5325
k is
.
HOT
−
is the nearest
.
the nearest
=
1.42 ±0.05
(2 SIDES)
10
⎞
⎠ ⎟
k
• .
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3 266 0 5325
• .
(
0.50 BSC
.
(
2 816 0 4086
2 816 0
1
1
%
%
0.25 ± 0.05
0.675 ±0.05
−
HOT
value
value
−
PACKAGE
OUTLINE
−
.
, the major error
.
.4 4 086
.
.
6-Lead Plastic DFN (2mm × 2mm)
(SEE NOTE 6)
(Reference LTC DWG # 05-08-1703)
TOP MARK
)
PIN 1 BAR
)
−
0 4086
.
0.200 REF
DC Package
The cold trip point error depends on the tolerance of the
NTC thermistor and the degree to which the ratio of its
value at 0°C and its value at 40°C varies from 6.14 to 1.
Therefore, the cold trip point error can be calculated using
the tolerance, TOL, the temperature coeffi cient of the
thermistor at 0°C, TC (in %/°C), the value of the thermistor
at 0°C, R
R
For example, the Vishay NTHS0603N01N1003J thermistor
with a tolerance of ±5%, TC of –5%/°C and R
of 6.13, has a cold trip point error of:
Temperature Error C
Temperature Error C
HOT
. The formula is:
0.75 ±0.05
COLD
2.00 ±0.10
(4 SIDES)
0.00 – 0.05
, and the value of the thermistor at 40°C,
( )
( )
° =
° =
0.56 ± 0.05
(2 SIDES)
= −
0 95
R = 0.115
⎛
⎝ ⎜
⎛
⎜ ⎜
⎝
BOTTOM VIEW—EXPOSED PAD
.
+ 1
1 0 05
+
6 14
TYP
6 14
°
.
.
TOL R
C
.
, .
1.37 ±0.05
(2 SIDES)
3
4
1 05
•
• .
6 13 1
R
−
°
6
1
COLD
TC
0.50 BSC
C
5
HOT
LTC4069
0.38 ± 0.05
−
0.25 ± 0.05
PIN 1
CHAMFER OF
EXPOSED PAD
− −
⎞
⎠ ⎟
COLD
1
⎞
⎠ ⎟
• 100
(DC6) DFN 1103
15
•
/R
100
4069fb
HOT