E-LIS3L02AS4 STMicroelectronics, E-LIS3L02AS4 Datasheet - Page 6

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E-LIS3L02AS4

Manufacturer Part Number
E-LIS3L02AS4
Description
ACCELEROMETER TRPL AXIS 24SOIC
Manufacturer
STMicroelectronics
Series
iMEMS®r
Datasheet

Specifications of E-LIS3L02AS4

Axis
X, Y, Z
Acceleration Range
±2g, 6g
Sensitivity
Vdd/5, Vdd/15 = V/g
Voltage - Supply
2.4 V ~ 3.6 V
Output Type
Analog
Bandwidth
1.5kHz
Interface
IC
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Sensing Axis
X, Y, Z
Acceleration
2 g, 6 g
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4924-5

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Functionality
The LIS3L02AS4 is a high performance, low-power, analog output three axes linear accelerometer packaged
in a SO24 package. The complete device includes a sensing element and an IC interface able to take the infor-
mation from the sensing element and to provide an analog signal to the external world.
4.1 Sensing element
A proprietary process is used to create a surface micro-machined accelerometer. The technology allows to carry
out suspended silicon structures which are attached to the substrate in a few points called anchors and are free
to move in the direction of the sensed acceleration. To be compatible with the traditional packaging techniques
a cap is placed on top of the sensing element to avoid blocking the moving parts during the moulding phase of
the plastic encapsulation.
When an acceleration is applied to the sensor the proof mass displaces from its nominal position, causing an
imbalance in the capacitive half-bridge. This imbalance is measured using charge integration in response to a
voltage pulse applied to the sense capacitor.
At steady state the nominal value of the capacitors are few pF and when an acceleration is applied the maximum
variation of the capacitive load is up to 100fF.
4.2 IC Interface
In order to increase robustness and immunity against external disturbances the complete signal processing
chain uses a fully differential structure. The final stage converts the differential signal into a single-ended one to
be compatible with the external world.
The signals of the sensing element are multiplexed and fed into a low-noise capacitive charge amplifier that im-
plements a Correlated Double Sampling (CDS) at its output to cancel the offset and the 1/f noise. The output
signal is de-multiplexed and transferred to three different S&Hs, one for each channel and made available to
the outside.
The low noise input amplifier operates at 200 kHz while the three S&Hs operate at a sampling frequency of 66
kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accurate output
waveform.
All the analog parameters (zero-g level, sensitivity and self-test) are ratiometric to the supply voltage. Increasing
or decreasing the supply voltage, the sensitivity and the offset will increase or decrease almost linearly. The self
test voltage change varies cubically with the supply voltage
4.3 Factory calibration
The IC interface is factory calibrated for Sensitivity (So) and Zero-g Level (Voff). The trimming values are stored
inside the device by a non volatile structure. Any time the device is turned on, the trimming parameters are
downloaded into the registers to be employed during the normal operation. This allows the user to employ the
device without further calibration.
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