ISL6420BEVAL1Z Intersil, ISL6420BEVAL1Z Datasheet - Page 16

• Manufacturer Part Number: ISL6420BEVAL1Z
• Description: EVAL BOARD 1 FOR ISL6420B
• Manufacturer: Intersil

Specifications of ISL6420BEVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is
very important. Switching current from one power
device to another can generate voltage transients
across the impedances of the interconnecting bond
wires and circuit traces. These interconnecting
impedances should be minimized by using wide, short
printed circuit traces. The critical components should
be located as close together as possible using ground
plane construction or single point grounding.
Figure 15 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should
be part of ground or power plane in a printed circuit
board. The components shown in Figure 15 should be
located as close together as possible. Please note that
the capacitors C
physical capacitors. Locate the ISL6420B within 3
inches of the MOSFETs, Q
for the MOSFETs’ gate and source connections from the
ISL6420B must be sized to handle up to 1A peak
current.
Figure 16 shows the circuit traces that require
additional layout consideration. Use single point and
ground plane construction for the circuits shown.
Minimize any leakage current paths on the SS PIN and
locate the capacitor, C
the internal current source is only 10µA. Provide local
V
the capacitor, C
and PHASE pins.
CC
FIGURE 14. PREBIASED OUTPUT AT 25mA LOAD
decoupling between VCC and GND pins. Locate
V
IN
= 12V, V
BOOT
IN
and C
OUT
as close as practical to the BOOT
ss
= 3.3V at 25mA LOAD
close to the SS pin because
O
1
16
each represent numerous
and Q
2
. The circuit traces
ISL6420B
FIGURE 15. PRINTED CIRCUIT BOARD POWER AND
FIGURE 16. PRINTED CIRCUIT BOARD SMALL
Feedback Compensation
Figure 17 highlights the voltage-mode control loop for
a synchronous-rectified buck converter. The output
voltage (V
level. The error amplifier (Error Amp) output (V
compared with the oscillator (OSC) triangular wave to
provide a pulse-width modulated (PWM) wave with an
amplitude of VIN at the PHASE node. The PWM wave
is smoothed by the output filter (L
The modulator transfer function is the small-signal
transfer function of V
dominated by a DC Gain and the output filter (L
C
zero at F
the input voltage (VIN) divided by the peak-to-peak
oscillator voltage ΔV
ENSS
O
C
), with a double pole break frequency at F
ISL6420B
SS
ISL6420B
ESR
UGATE
PHASE
LGATE
OUT
GND
GND
GROUND PLANES OR ISLANDS
SIGNAL LAYOUT GUIDELINES
. The DC Gain of the modulator is simply
) is regulated to the Reference voltage
PHASE
OSC
C
V
BOOT
OUT
BOOT
CC
+5V
.
VIN
Q2
Q1
/V
RETURN
C
E/A
VCC
D
1
D2
. This function is
O
C
+VIN
Q
and C
IN
Q
1
2
L
O
L
C
December 4, 2009
O
O
C
O
O
).
V
LC
OUT
E/A
and a
O
FN6901.1
V
and
) is
OUT