LMH1982SQEEVAL/NOPB National Semiconductor, LMH1982SQEEVAL/NOPB Datasheet - Page 2

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LMH1982SQEEVAL/NOPB

Manufacturer Part Number
LMH1982SQEEVAL/NOPB
Description
EVAL BOARD FOR LMH1982SQE
Manufacturer
National Semiconductor
Datasheet

Specifications of LMH1982SQEEVAL/NOPB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.national.com
1.0 LMH1982 Evaluation Board
The LMH1982 evaluation board was designed by National
Semiconductor (NSC) to evaluate the performance and op-
eration of the LMH1982 multi-rate video clock and timing
generator with the LMH1981 SD/HD video sync separator.
The evaluation board provides input ports to receive analog
or digital reference signals, SMA connector ports to transmit
the differential output clocks, and headers to access various
input/output signals. On-board toggle switches allow control
over the sync inputs and control inputs, such as device reset.
A USB interface board is also provided to allow programming
of the LMH1982 through a PC's USB port using NSC's
LMH1982 evaluation software.
1.2 POWER SUPPLIES
The evaluation board requires a 5V supply and ground con-
nection to power the on-board LP38693 LDO regulators (U1,
U2).
To use 5V from the USB port via header J7, shunt pins 1 and
2 of jumper JP3. Refer to Table 1 for the pin assignment of
JP3. If the USB supply is used, make sure that the USB port
of the PC is capable of nominally sourcing 150 mA (0.75W at
5V). When powering the evaluation board, the USB supply
voltage should measure 5V ± 5% at pin 4 of J7.
To use an external 5V supply, shunt pins 2 and 3 of JP3 and
connect the supply leads to pins 1 and 2 of header J1.
The LP38693 LDO regulators provide clean 3.3V and 2.5V for
the evaluation board. If needed, it is possible to bypass the
LDOs and apply external 3.3V and 2.5V supplies to the ap-
propriate pins of J1. See Table 2 for the pin assignments of
J1. Before applying an external 3.3V supply, remove R2 and
short JP1. Similarly, before applying an external 2.5V supply,
Pin #, Location
2, Center
3, Right
1, Left
TABLE 1. 5V Select Jumper, JP3
FIGURE 1. Simplified Block Diagram of the Evaluation Setup
Pin Name
INPUT 5V
USB 5V
EXT 5V
2
Refer to the Evaluation Board Schematic, PCB Layout, and
Bill of Materials sections, as well as the collateral listed in the
References section.
1.1 USB INTERFACE BOARD
Headers X2 and X4 of the USB interface board should be
plugged into headers J7 and J11 of the evaluation board. The
USB board's firmware supports the I
ables the user to program the LMH1982 from a PC running
the evaluation software. The USB board can also provide 5V
from the PC's USB port to power the LDO regulators on the
evaluation board. The block diagram in Figure 1 shows the
connections between the PC, USB board, and evaluation
board.
remove R4 and short JP2. If external supplies are used, it is
recommended to keep the supply noise to within the same
levels offered by the on-board LDO regulators. Refer to the
LP38693 datasheet for more information.
The LMH1982 requires that 3.3V and 2.5V are regulated to
within ±5% and have low noise to ensure optimal output jitter
performance. The 27 MHz VCXO also requires a clean 3.3V
supply and proper supply bypassing for optimal performance.
The DVDD (2.5V) and VDD (3.3V) supply voltages of the
LMH1982 can be measured at test points TP1 and TP3, re-
spectively. DVDD and VDD supply currents can also mea-
sured by removing the 0Ω resistors from R22 and R3 and then
using a current meter in series.
Pin #, Location
6, Right-most
1, Left-most
TABLE 2. External Power Header, J1
2
3
4
5
2
C interface, which en-
Pin Name
EXT 3V3
EXT 2V5
EXT 5V
GND
GND
GND
30061909

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