SD356EVK/NOPB National Semiconductor, SD356EVK/NOPB Datasheet - Page 9

• Manufacturer Part Number: SD356EVK/NOPB
• Description: EVAL BOARD FOR LMH0356
• Manufacturer: National Semiconductor

Specifications of SD356EVK/NOPB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Test Equipment Settings
The example eye diagram shown is for a 1.4835 Gb/s HD SDI signal. Similar eye diagrams can be
obtained at 2.97 Gb/s and at 270 Mb/s by changing the bit rate setting on the signal generator.
Data Rate
Data Pattern
Output Amplitude
Output Offset
Injected Jitter
SD356EVK User Manual
Rev 1.0
Generator Setting
1.4835 Gb/s
PRBS-7
200 mV
0 V
0 UI
© 2008, National Semiconductor Corp.
Value
9 of 11
Any valid SMPTE data rate
supported by the LMH0356
SDI reclocker can be used.
These rates are 270 Mb/s,
1.485 Gb/s, 1.4835 Gb/s,
2.967 Gb/s, and 2.97 Gb/s
This is a standard
pseudorandom pattern 127
bits long. Other
pseudorandom patterns can
be used as well as live SDI
video patterns (which are not,
in general, pseudorandom) or
the SMPTE pathological data
sequences.
This is the specified lower limit
for the input differential voltage
for the LMH0356. Higher input
voltages can be used. A
differential input voltage of 200
mV peak-to-peak means that
each of the two inputs swings
100 mV peak-to-peak.
The inputs of the SD356EVK
are AC coupled so the output
offset of the generator does
not matter unless it
overstresses the input
coupling capacitors. Do not
exceed 4 V output offset on
the generator to avoid this.
If the signal generator is
capable of injecting controlled
jitter, the jitter tolerance of the
LMH0356 may be evaluated
using the SD356EVK board.
Typical settings used for jitter
tolerance testing on the
SD36EVK board are 0.7 UI
jitter amplitude at 5 MHz and
10 MHz jitter frequencies.
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