ISL9208EVAL2Z Intersil, ISL9208EVAL2Z Datasheet - Page 15

• Manufacturer Part Number: ISL9208EVAL2Z
• Description: EVAL BOARD 2 FOR ISL9208
• Manufacturer: Intersil

Specifications of ISL9208EVAL2Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Configuration Registers
The device is configured for specific application
requirements using the Configuration Registers. The
configuration registers consist of SRAM memory.
SETTING
OCDV1
OCDT1
SCDV1
5:2
BIT 6
BIT 3
BIT 1
BIT
Bit 7
Bit 4
7
6
1
0
0
0
1
1
0
0
1
1
0
0
1
1
Turn on VMON connection
Turn off automatic OC
Turn off automatic SC
discharge control
discharge control
RESERVED
Force Sleep
LDMONEN
DENOCD
FUNCTION
DENSCD
OCDV0
SCDV0
OCDT0
SLEEP
BIT 5
BIT 2
BIT 0
CFET
DFET
0
1
0
1
0
1
0
1
0
1
0
1
15
TABLE 7. DISCHARGE SET CONFIG REGISTER (ADDR: 05H)
TABLE 6. FET CONTROL REGISTER (ADDR: 04H)
When set to ‘0’, a discharge overcurrent condition automatically turns off the FETs.
When set to ‘1’, a discharge overcurrent condition will not automatically turn off the FETs.
In either case, this condition sets the DOC bit, which also turns on the TEMP3V output.
V
V
V
V
When set to ‘0’, a discharge short circuit condition turns off the FETs.
When set to ‘1’, a discharge short circuit condition will not automatically turn off the FETs.
In either case, the condition sets the SCD bit, which also turns on the TEMP3V output.
V
V
V
V
t
t
t
t
OCD
OCD
OCD
OCD
OCD
OCD
OCD
OCD
SCD
SCD
SCD
SCD
Setting this bit to “1” forces the device to go into a sleep condition. This turns off both FET
outputs, the cell balance outputs and the voltage regulator. This also resets the CFET, DFET,
and CB7ON:CB1ON bits. The SLEEP bit is automatically reset to “0” when the device wakes
up. This bit does not reset the AO3:AO0 bits.
Writing a “1” to this bit turns on the VMON circuit. Writing a “0” to this bit turns off the VMON
circuit. As such, the microcontroller has full control of the operation of this circuit.
Reserved for future expansion.
Setting this bit to “1” turns on the charge FET.
Setting this bit to “0” turns off the charge FET.
This bit is automatically reset in the event of a charge overcurrent condition, unless the
automatic response is disabled by the DENOCC bit.
Setting this bit to “1” turns on the discharge FET.
Setting this bit to “0” turns off the discharge FET.
This bit is automatically reset in the event of a discharge overcurrent or discharge short circuit
condition, unless the automatic response is disabled by the DENOCD or DENSCD bits.
= 160ms (2.5ms if DTDIV = 1)
= 320ms (5ms if DTDIV = 1)
= 640ms (10ms if DTDIV = 1)
= 1280ms (20ms if DTDIV = 1)
= 0.20V
= 0.35V
= 0.65V
= 1.20V
= 0.10V
= 0.12V
= 0.14V
= 0.16V
ISL9208
SHORT CIRCUIT DISCHARGE VOLTAGE THRESHOLD
OVERCURRENT DISCHARGE VOLTAGE THRESHOLD
OVERCURRENT DISCHARGE TIME-OUT
This memory is powered by the RGO output. In a sleep
condition, an internal switch converts power for the contents
of these registers from RGO to the VCELL1 input.
DESCRIPTION
FUNCTION
November 2, 2007
FN6446.1