ISL6267HRZ Intersil, ISL6267HRZ Datasheet - Page 24

• Manufacturer Part Number: ISL6267HRZ
• Description: IC PWM CTRLR MULTIPHASE 48TQFN
• Manufacturer: Intersil

Specifications of ISL6267HRZ

• Applications: Converter, AMD Fusion™ CPU GPU
• Voltage - Input: 4.75 V ~ 5.25 V
• Number Of Outputs: 2
• Voltage - Output: 0.0125 V ~ 1.55 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MOSFET r
inductor current. A phase comparator inside the controller
monitors the phase voltage during on-time of the low-side
MOSFET and compares it with a threshold to determine the zero
crossing point of the inductor current. If the inductor current has
not reached zero when the low-side MOSFET turns off, it will flow
through the low-side MOSFET body diode, causing the phase
node to have a larger voltage drop until it decays to zero. If the
inductor current has crossed zero and reversed the direction
when the low-side MOSFET turns off, it will flow through the
high-side MOSFET body diode, causing the phase node to have a
spike until it decays to zero. The controller continues monitoring
the phase voltage after turning off the low-side MOSFET. To
minimize the body diode-related loss, the controller also adjusts
the phase comparator threshold voltage accordingly in iterative
steps such that the low-side MOSFET body diode conducts for
approximately 40ns.
Key Component Selection
Inductor DCR Current-Sensing Network
Figure 20 shows the inductor DCR current-sensing network for a
3-phase solution. An inductor current flows through the DCR and
creates a voltage drop. Each inductor has two resistors in R
and R
current by sensing the DCR voltage drop. The R
resistors are connected in a summing network as shown, and feed
the total current information to the NTC network (consisting of
R
temperature coefficient (NTC) thermistor, used to temperature
compensate the inductor DCR change.
The inductor output side pads are electrically shorted in the
schematic but have some parasitic impedance in actual board
layout, which is why one cannot simply short them together for the
current-sensing summing network. It is recommended to use
1Ω~10Ω R
smaller than the rest of the current sensing circuit, the following
analysis ignores it.
The summed inductor current information is presented to the
capacitor C
ntcs
DCR
, R
PHASE1
o
L
connected to the pads to accurately sense the inductor
ntc
DS(ON)
FIGURE 20. DCR CURRENT-SENSING NETWORK
o
and R
n
DCR
to create quality signals. Since R
. Equations 18 thru 22 describe the frequency
PHASE2 PHASE3
L
I
O
voltage drop, which is proportional to the
p
) and capacitor C
DCR
L
R
R
R
24
R
R
R
SUM
SUM
SUM
R
R
O
O
O
NTCS
NTC
n
. R
ntc
R
P
is a negative
o
value is much
sum
CN
RI
and R
+
-
VCN
I
I
SUM+
SUM-
o
sum
ISL6267
domain relationship between inductor total current I
voltage V
V
R
where N is the number of phases.
Transfer function A
DCR value increases as the winding temperature increases,
giving higher reading of the inductor DC current. The NTC R
value decrease as its temperature decreases. Proper selection of
R
represents the inductor total DC current over the temperature
range of interest.
There are many sets of parameters that can properly temperature-
compensate the DCR change. Since the NTC network and the R
resistors form a voltage divider, V
inductor DCR voltage. It is recommended to have a higher ratio of
V
signal level to work with.
A typical set of parameters that provide good temperature
compensation are: R
and R
may need to be fine tuned on actual boards. One can apply full
load DC current and record the output voltage reading
immediately; then record the output voltage reading again when
the board has reached the thermal steady state. A good NTC
network can limit the output voltage drift to within 2mV. It is
recommended to follow the Intersil evaluation board layout and
current sensing network parameters to minimize engineering
time.
V
achieve good transient response. Transfer function A
pole w
A
and solving for the solution, Equation 23 gives Cn value.
ω
ω
A
Cn
cn
Cn
cs
ntcnet
sns
sum
cs
L
(s) is unity gain at all frequencies. By forcing w
s ( )
s ( )
=
(s) also needs to represent real-time I
to the inductor DCR voltage so the droop circuit has a higher
, R
=
ntc
DCR
----------- -
sns
=
=
L
----------------------------------------------------- -
R
---------------------------------------- -
R
ntcs
=
= 10kΩ (ERT-J1VR103J). The NTC network parameters
Cn
ntcnet
ntcnet
⎛
⎜
⎜
⎜
⎝
----------------------
1
and a zero w
---------------------------------------- -
R
(
-------------------------------------------------- -
1
R
R
+
(s):
ntcnet
, R
+
ntcs
ntcs
----------- -
ω
------
ω
R
sns
p
s
s
×
+
ntcnet
L
and R
1
+
+
R
------------- -
R
------------- -
+
R
R
sum
sum
cs
N
N
R
------------- -
ntc
ntc
sum
(s) always has unity gain at DC. The inductor
sum
N
ntc
)
×
L
+
. One needs to match w
×
C
= 3.65kΩ, R
R
×
parameters ensures that V
R
n
p
DCR
----------- -
p
N
⎞
⎟
⎟
⎟
⎠
cn
×
is always a fraction of the
I
o
s ( )
p
= 11kΩ, R
×
o
A
(s) for the controller to
cs
s ( )
L
ntcs
and w
L
equal to w
January 31, 2011
o
Cn
cs
= 2.61kΩ
(s) and C
(s) has a
sns
(EQ. 18)
(EQ. 19)
(EQ. 20)
(EQ. 21)
(EQ. 22)
FN7801.0
so
ntc
sum
sns
n