MC13892VL Freescale Semiconductor, MC13892VL Datasheet - Page 99

• Manufacturer Part Number: MC13892VL
• Description: IC PMU I.MX51/37/35/27 186MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC13892VL

• Applications: Battery Management, Display (LED Drivers), Handheld/Mobile Devices, Power Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 186-LFBGA
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Package Type: BGA
• Case Length: 12mm
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Compliant

CONVERTER CORE
approximately 2.0 MHz. If an ADC conversion is requested while the PLL was not active, it will automatically be enabled by the
ADC. A 32.768 kHz equivalent time base is derived from this to the ADC time events. The ADC is supplied from VCORE. The
ADC core has an integrated auto calibration circuit which reduces the offset and gain errors.
converter will change accordingly. Although the conversion time is inversely proportional to the PLLX[2:0] setting, this will not
influence the ADC performance. The locally derived 32.768 kHz will remain constant in order not to influence the different timings
depending on this time base.
INPUT SELECTOR
Table 81. ADC Inputs
inputs are mapped on the ADC channels 4 to 7 and channels 0 to 3 become unused. For more details see the touch screen
interface section.
the battery current are indirectly read out by the voltage drop over the resistor in the charge path and battery path respectively.
For details on scaling see the dedicated readings section.
GPO4 path, an on chip buffer can be activated through the BUFFEN bit. If this bit is set, the buffer will be active on these specific
inputs during an active conversion. Outside of the conversions the buffer is automatically disabled. The buffer will add some
offset, but will not impact INL and DNL numbers except for input voltages close to zero.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Notes
70.
71.
The ADC core is a 10 bit converter. The ADC core and logic run on 2/3 of the switcher PLL generated frequency, so
The switcher PLL is programmable, see Supplies. When the switcher frequency is changed, the frequency applied to the ADC
The ADC has 8 input channels.
Channel
The above table is valid when setting the bit ADSEL = 0 (default). If setting the bit to a 1, the touch screen interface related
Some of the internal signals are first scaled to adapt the signal range to the input range of the ADC. The charge current and
In case the source impedance is not sufficiently low on the directly accessible inputs ADIN5, ADIN6, ADIN7, and the muxed
0
1
2
3
4
5
6
7
Equivalent to -3.0 to +3.0 A of current with a 20 mOhm sense resistor
Equivalent to -3.0 to +3.0 A of current with a 100 mOhm sense resistor
ADA1[2:0]
ADA2[2:0]
000
001
010
011
100
101
110
111
Battery Voltage (BATT)
Battery Current
(BATT-BATTISNSCC)
Application Supply (BPSNS)
Charger Voltage (CHRGRAW)
Charger Current
(CHRGISNS-BPSNS)
General Purpose ADIN5
(Battery Pack Thermistor)
General Purpose ADIN6
Backup Voltage (LICELL)
General Purpose ADIN7/ADIN7B
General Purpose ADIN7
General Purpose ADIN7B
Die Temperature
UID
Table 81
gives an overview of the attributes of the A to D channels.
Signal read
ADC SUBSYSTEM
-300 mV – 300 mV
-60 mV – 60 mV
Input Level
0 – VIOHI
0 – 4.8 V
0 – 4.8 V
0 – 2.4 V
0 – 2.4 V
0 – 3.6 V
0 – 2.4 V
0 – 4.8 V
0 – 12 V
0 – 20 V
0 – BP
–
(70)
(71)
FUNCTIONAL DEVICE OPERATION
Scaling
x2/3
x20
/10
x4
x1
x1
x1
/2
/2
/5
/2
/2
/2
–
ADC SUBSYSTEM
Scaled Version
-1.2 – 1.2 V
-1.2 – 1.2 V
1.2 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 2.4 V
0 – 1.4 V
0 – 2.4 V
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