NX3L4684TK,132 NXP Semiconductors, NX3L4684TK,132 Datasheet
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NX3L4684TK,132
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NX3L4684 Low-ohmic dual single-pole double-throw analog switch Rev. 5 — 7 January 2011 1. General description The NX3L4684 is a dual low-ohmic single-pole double-throw analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. Each switch has a digital ...
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... NXP Semiconductors 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C NX3L4684GM −40 °C to +125 °C NX3L4684TK 5. Marking Table 2. Marking Type number NX3L4684GM NX3L4684TK 6. Functional diagram 1Y0 1S 1Z ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning NX3L4684 1Y0 1Y1 4 Transparent top view Fig 3. Pin configuration SOT1049-2 (XQFN10U) 7.2 Pin description Table 3. Pin description Symbol Pin SOT1049-2 1Y0 1Y1 2Y1 2Y0 9 GND 10 NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch ...
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... NXP Semiconductors 8. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage ...
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... NXP Semiconductors 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage select input nS; I current V = GND to 4.3 V ...
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... NXP Semiconductors 11.1 Test circuits V − Fig 5. Test circuit for measuring OFF-state leakage current − Fig 6. Test circuit for measuring ON-state leakage current NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch nY0 switch nY1 GND − 0 0.3 V. ...
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... NXP Semiconductors 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Symbol Parameter Conditions R ON resistance port nY0; see ON(peak) (peak) V port nY1; see V ΔR ON resistance V ON mismatch between channels R ON resistance port nY0; V ...
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... NXP Semiconductors 11.3 ON resistance test circuit and graphs Fig 7. Test circuit for measuring ON resistance 0 (Ω) 0.6 (1) 0.4 (2) (3) (4) 0 °C. Measured at T amb Fig 8. Typical ON resistance as a function of input voltage (nY0 port) NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch ...
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... NXP Semiconductors 0 (Ω) 0.6 0.4 (1) (2) (3) 0.2 ( 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 10. ON resistance as a function of input voltage 1.5 V (nY0 port (Ω) 0.4 (1) (2) (3) 0.2 ( 125 °C. (1) T amb = 85 °C. ...
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... NXP Semiconductors 0 (Ω) 0.4 (1) (2) (3) 0.2 ( 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 14. ON resistance as a function of input voltage 2.5 V (nY0 port (Ω) 0.4 (1) (2) (3) 0.2 ( 125 °C. (1) T amb = 85 °C. (2) T amb = 25 ° ...
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... NXP Semiconductors 0 (Ω) 0.4 (1) (2) (3) 0.2 ( 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 18. ON resistance as a function of input voltage 3.3 V (nY0 port (Ω) 0.4 (1) (2) (3) (4) 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 ° ...
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... NXP Semiconductors 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t enable time nYn; en see t disable time nYn; dis see t break-before-make see b-m time [1] Typical values are measured at T [2] Break-before-make guaranteed by design ...
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... NXP Semiconductors 12.1 Waveform and test circuits nY1 connected to V nY0 connected to V Measurement points are given in Logic level typical output voltage level that occurs with the output load. OH Fig 22. Enable and disable times Table 10. Measurement points Supply voltage 4.3 V ...
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... NXP Semiconductors a. Test circuit. b. Input and output measurement points Fig 23. Test circuit for measuring break-before-make timing G Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance External voltage for measuring switching times. EXT Fig 24. Load circuit for switching times Table 11 ...
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... NXP Semiconductors 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V ≤ specified 2.5 ns Symbol Parameter THD total harmonic distortion −3 dB frequency f (−3dB) response α isolation (OFF-state) iso V crosstalk voltage ct Xtalk crosstalk Q charge injection ...
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... NXP Semiconductors 12.3 Test circuits Fig 25. Test circuit for measuring total harmonic distortion Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 26. Test circuit for measuring the frequency response when channel is in ON-state V Adjust f voltage to obtain 0 dBm level at input. i Fig 27. Test circuit for measuring isolation (OFF-state) ...
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... NXP Semiconductors a. Test circuit b. Input and output pulse definitions Fig 28. Test circuit for measuring crosstalk voltage between digital inputs and switch 20 log ( log Fig 29. Test circuit for measuring crosstalk between switches NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch ...
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... NXP Semiconductors a. Test circuit. b. Input and output pulse definitions = ΔV × C Definition: Q inj O L ΔV = output voltage variation generator resistance. gen V = generator voltage. gen Fig 30. Test circuit for measuring charge injection NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch ...
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... NXP Semiconductors 13. Package outline XQFN10U: plastic extremely thin quad flat package; no leads; 10 terminals; UTLP based; body 2 x 1.55 x 0.5 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) UNIT max 0.50 0.05 0.30 mm nom 0.03 0.23 min 0.00 0.15 ...
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... NXP Semiconductors HVSON10: plastic thermal enhanced very thin small outline package; no leads; 10 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant 15. Revision history Table 14. Revision history Document ID Release date NX3L4684 v.5 20110107 • Modifications: Section NX3L4684 v ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: NX3L4684 Product data sheet Low-ohmic dual single-pole double-throw analog switch 16 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 4 9 Limiting values Recommended operating conditions Static characteristics 11.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 ...