74AUP1G09GW,125 NXP Semiconductors, 74AUP1G09GW,125 Datasheet - Page 15

IC GATE AND LP 2INPUT TSSOP5

74AUP1G09GW,125

Manufacturer Part Number
74AUP1G09GW,125
Description
IC GATE AND LP 2INPUT TSSOP5
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G09GW,125

Product
AND
Number Of Gates
1
Propagation Delay Time
4.9 ns, 5.9 ns, 6.5 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5391-2
NXP Semiconductors
14. Abbreviations
Table 11.
15. Revision history
Table 12.
74AUP1G09
Product data sheet
Acronym
CDM
DUT
ESD
HBM
MM
Document ID
74AUP1G09 v.2
Modifications:
74AUP1G09 v.1
Abbreviations
Revision history
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Release date
20100709
20090115
Added type number 74AUP1G09GN (SOT1115/XSON6 package).
Added type number 74AUP1G09GS (SOT1202/XSON6 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Rev. 2 — 9 July 2010
Low-power 2-input AND gate with open-drain
Change notice
-
-
74AUP1G09
74AUP1G09 v.1
-
Supersedes
© NXP B.V. 2010. All rights reserved.
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