74VHC125PW,118 NXP Semiconductors, 74VHC125PW,118 Datasheet - Page 2
![IC BUFFER/LINE DVR QUAD 14TSSOP](/photos/15/65/156577/tssop14_sml.jpg)
74VHC125PW,118
Manufacturer Part Number
74VHC125PW,118
Description
IC BUFFER/LINE DVR QUAD 14TSSOP
Manufacturer
NXP Semiconductors
Series
74VHCr
Datasheet
1.74VHCT125PW118.pdf
(15 pages)
Specifications of 74VHC125PW,118
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
25mA, 25mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP (0.173", 4.40mm Width)
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5168-2
NXP Semiconductors
4. Functional diagram
5. Pinning information
74VHC_VHCT125_2
Product data sheet
Fig 1.
Fig 4.
Logic symbol
Pin configuration SO14 and TSSOP14
10
12
13
2
1
5
4
9
GND
1OE
2OE
1A
1Y
2A
2Y
1OE
2OE
3OE
4OE
1A
2A
3A
4A
5.1 Pinning
1
2
3
4
5
6
7
mna228
1Y
2Y
3Y
4Y
74VHCT125
74VHC125
11
3
6
8
001aak044
14
13
12
11
10
9
8
Fig 2.
V
4OE
4A
4Y
3OE
3A
3Y
CC
Rev. 02 — 13 October 2009
IEC logic symbol
10
12
13
2
1
5
4
9
EN1
mna229
1
Fig 5.
(1) The die substrate is attached to this pad using
74VHC125; 74VHCT125
11
3
6
8
conductive die attach material. It can not be used as a
supply pin or input.
Pin configuration DHVQFN14
index area
terminal 1
2OE
1A
1Y
2A
2Y
Fig 3.
nOE
Transparent top view
2
3
4
5
6
nA
Quad buffer/line driver; 3-state
74VHCT125
74VHC125
GND
Logic diagram (one buffer)
(1)
13
12
11
10
9
001aak045
© NXP B.V. 2009. All rights reserved.
4OE
4A
4Y
3OE
3A
mna227
2 of 15
nY