SI3011-F-FS Silicon Laboratories Inc, SI3011-F-FS Datasheet - Page 36

• Manufacturer Part Number: SI3011-F-FS
• Description: IC VOICE DAA GCI/PCM/SPI 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3011-F-FS

• Includes: Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
• Function: Data Access Arrangement (DAA)
• Interface: PCM, Serial, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 8.5mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si3050 + Si3011/18/19
cancellation and has greater than 4 dB of margin with or
without the dongle for South Africa, Australia, TBR21,
Germany,
specifications.
5.24. On-Hook Line Monitor
The on-hook line monitor mode allows the Si3050 to
receive line activity when in an on-hook state. This
mode is typically used to detect caller ID data (see
“5.25.Caller ID”) and is enabled by setting the ONHM bit
(Register 5, bit 3). Caller ID data can be gained up or
attenuated using the receive gain control bits in
Registers 39 and 41.
5.25. Caller ID
The Si3050 can pass caller ID data from the phone line
to a caller ID decoder connected to the DAA.
5.25.1. Type I Caller ID
Type I Caller ID sends the CID data when the phone is
on-hook.
In systems where the caller ID data is passed on the
phone line between the first and second rings, utilize the
following method to capture the caller ID data:
1. After identifying a ring signal using one of the
2. Assert the ONHM bit (Register 5, bit 3) to enable
3. Clear the ONHM bit after the caller ID data is
In systems where the caller ID data is preceded by a
line polarity (battery) reversal, use the following method
to capture the caller ID data:
1. Enable full wave rectified ring detection (RFWE,
2. Monitor the RDTP and RDTN register bits (or the
36
methods described in "5.18. Ring Detection" on
page 33, determine when the first ring is complete.
caller ID data detection. The caller ID data is passed
across the RNG 1/2 pins and presented to the host
via the DTX pin.
received.
Register 18, bit 1).
POLI bit with the Si3011 or Si3019 line-side) to
identify if a polarity reversal or a ring signal has
occurred. A polarity reversal trips either the RDTP or
RDTN ring detection bits, therefore the full-wave ring
detector must be used to distinguish a polarity
reversal from a ring. The lowest specified ring
frequency is 15 Hz; so, if a battery reversal occurs,
the DSP should wait a minimum of 40 ms to verify
that the event is a battery reversal and not a ring
signal. This time is greater than half the period of the
longest ring signal. If another edge is detected
during this 40 ms pause, this event is characterized
as a ring signal and not a battery reversal.
and
Switzerland
country-specific
Rev. 1.5
3. Assert the ONHM bit (Register 5, bit 3) to enable
4. Clear the ONHM bit after the caller ID data is
5.25.2. Type II Caller ID (Si3011 and Si3019 Line-Side
Type II Caller ID sends the CID data while the phone is
off-hook. This mode is often referred to as caller ID/
call waiting (CID/CW). To receive the CID data when
off-hook, use the following procedure (also see
Figure 26):
1. The Caller Alert Signal (CAS) tone is sent from the
2. The DAA must check if there is another parallel
caller ID data detection. The caller ID data is passed
across the RNG 1/2 pins and presented to the host
via the DTX pin.
received.
central office (CO) and is digitized along with the line
data. The host processor detects the presence of
this tone.
device on the same line, which is accomplished by
briefly going on-hook, measuring the line voltage,
and returning to an off-hook state.
a. Set the CALD bit (Register 17, bit 5) to disable
b. Set the RCALD bit (Register 25, bit 5) to disable
c. Set the FOH[1:0] bits (Register 31 bits 6:5) to 11
d. Clear the OH bit (Register 5, bit 0). This puts the
e. Read the LVS bits to determine the state of the
Device Only)
the calibration that automatically occurs when
going off-hook.
the resistor calibration that automatically occurs
when going off-hook
to reduce the time period for the off-hook counter
to 8 ms allowing compliance to the Type II CID
timing requirements.
DAA into an on-hook state. The RXM bit
(Register 15, bit 3) also can be set to mute the
receive path.
line. If the LVS bits read the typical on-hook line
voltage, then there are no parallel devices active
on the line, and CID data reception can be
continued. If the LVS bits read well below the
typical on-hook line voltage, then there are one or
more devices present and active on the same line
that are not compliant with Type II CID. Do not
continue CID data reception.