SI3011-F-FS Silicon Laboratories Inc, SI3011-F-FS Datasheet

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SI3011-F-FS

Manufacturer Part Number
SI3011-F-FS
Description
IC VOICE DAA GCI/PCM/SPI 16SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3011-F-FS

Includes
Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
Function
Data Access Arrangement (DAA)
Interface
PCM, Serial, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
8.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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P
Features
Applications
Description
The Si3050+Si3011/18/19 Voice DAA chipset provides a highly-programmable
and globally-compliant foreign exchange office (FXO) analog interface. The
solution implements Silicon Laboratories' patented isolation capacitor technology,
which eliminates the need for costly isolation transformers, relays, or
opto-isolators, while providing superior surge immunity for robust field
performance. The Voice DAA is available as a chipset, a system-side device
(Si3050) paired with a line-side device (Si3011/18/19). The Si3050 is available in
a 20-pin TSSOP or a 24-pin QFN. The Si3011/18/19 is available in a 16-pin
TSSOP, a 16-pin SOIC, or a 20-pin QFN and requires minimal external
components. The Si3050 interfaces directly to standard telephony PCM
interfaces.
Functional Block Diagram
Rev. 1.5 10/11
R O G R A M M A B L E
PCM highway data interface
µ-law/A-law companding
SPI control interface
GCI interface
80 dB dynamic range TX/RX
Line voltage monitor
Loop current monitor
+6 dBm or +3.2 dBm TX/RX level
mode
Parallel handset detection
3 µA on-hook line monitor current
Overload detection
Programmable line interface




DSL IADs
VoIP gateways
PBX and IP-PBX systems
AC termination
DC termination
Ring detect threshold
Ringer impedance
AOUT/INT
SDI THRU
FSYNC
RESET
RGDT
TGDE
SCLK
PCLK
TGD
SDO
DRX
DTX
CS
SDI
RG
Interface
Interface
Control
Control
Logic
Data
Line
Data
Si3050
Interface
Isolation
V
O I C E
Copyright © 2011 by Silicon Laboratories
TIP/RING polarity detection
Integrated codec and 2- to 4-wire
analog hybrid
Programmable digital hybrid for
near-end echo reduction
Polarity reversal detection
Programmable digital gain in 0.1 dB
increments
Integrated ring detector
Type I and II caller ID support
Pulse dialing support
3.3 V power supply
Daisy-chaining for up to 16 devices
Greater than 5000 V isolation
Patented isolation technology
Ground start and loop start support
Available in Pb-free RoHS-compliant
packages
Voice mail systems
DECT base stations
Interface
Isolation
D A A S
S i 3 0 5 0 + S i 3 0 11 / 1 8 / 1 9
Si3018/19
Terminations
Ring Detect
Hybrid, AC
and DC
Off-Hook
O L U T I O N S
RX
IB
SC
DCT
VREG
VREG2
DCT2
DCT3
RNG1
RNG2
QB
QE
QE2
US Patent# 5,870,046
US Patent# 6,061,009
FSYNC
PCKLK
RGDT
DTX
DRX
C1B
C2B
CS
NC
RX
IB
Ordering Information
1
2
3
4
5
6
Package Options
1
2
3
4
5
6
See page 106.
20
7
Si3011/18/19
Si3050
Top View
19
Si3050 + Si3011/18/19
8
Si3050
IGND
PAD
GND
18
9
17
10
16
15
14
13
12
11
18
17
16
15
14
13
DCT3
QB
QE2
SC
NC
GND
VDD
VA
C1A
C2A
RESET

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