STM32F100R8H6B STMicroelectronics, STM32F100R8H6B Datasheet - Page 54

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STM32F100R8H6B

Manufacturer Part Number
STM32F100R8H6B
Description
IC ARM CORTEX MCU 64KB 64TFBGA
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F100R8H6B

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFBGA
Core
ARM Cortex M3
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
STM32100B-EVAL - EVAL BOARD FOR STM32F100VBT6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Price
Part Number:
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Electrical characteristics
5.3.11
54/87
Electromagnetic Interference (EMI)
The electromagnetic field emitted by the device is monitored while a simple application is
executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with
IEC 61967-2 standard which specifies the test board and the pin loading.
Table 30.
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
Table 31.
1. Based on characterization results, not tested in production.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
These tests are compliant with EIA/JESD78 IC latch-up standard.
Table 32.
Symbol Parameter
V
V
Symbol
Symbol
S
ESD(HBM)
ESD(CDM)
EMI
LU
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
Peak level
Static latch-up class
Electrostatic discharge
voltage (human body model)
Electrostatic discharge
voltage (charge device model)
EMI characteristics
ESD absolute maximum ratings
Electrical sensitivities
Parameter
V
LQFP100 package
compliant with SAE
J1752/3
Ratings
DD
= 3.6 V, T
Conditions
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Doc ID 16455 Rev 6
A
T
A
= 25°C,
= +105 °C conforming to JESD78
T
conforming to JESD22-A114
T
conforming to JESD22-C101
A
A
= +25 °C
= +25 °C
30 MHz to 130 MHz
0.1 MHz to 30 MHz
130 MHz to 1GHz
frequency band
SAE EMI Level
Monitored
Conditions
Conditions
Max vs. [f
Class
8/24 MHz
2
II
16
19
9
4
HSE
Maximum
value
/f
HCLK
2000
500
II level A
Class
(1)
]
dBµV
Unit
Unit
-
V

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