STM32F100C6T6BTR STMicroelectronics, STM32F100C6T6BTR Datasheet - Page 72

IC ARM CORTEX MCU 32KB 48LQFP

STM32F100C6T6BTR

Manufacturer Part Number
STM32F100C6T6BTR
Description
IC ARM CORTEX MCU 32KB 48LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F100C6T6BTR

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LFQFP
Core
ARM Cortex M3
For Use With
STM32100B-EVAL - EVAL BOARD FOR STM32F100VBT6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Electrical characteristics
5.3.18
Table 46.
72/87
V
V
V
R
R
C
DAC_OUT
min
DAC_OUT
max
DAC_OUT
min
DAC_OUT
max
I
I
DNL
INL
DDVREF+
DDA
Symbol
DDA
REF+
SSA
LOAD
O
LOAD
(1)
(3)
(1)
(1)
(1)
(1)
(3)
(2)
(1)
Analog supply voltage
Reference supply voltage
Ground
Resistive load with buffer ON
Impedance output with buffer OFF
Capacitive load
Lower DAC_OUT voltage with buffer
ON
Higher DAC_OUT voltage with buffer
ON
Lower DAC_OUT voltage with buffer
OFF
Higher DAC_OUT voltage with buffer
OFF
DAC DC current consumption in
quiescent mode (Standby mode)
DAC DC current consumption in
quiescent mode (Standby mode)
Differential non linearity Difference
between two consecutive code-1LSB)
Integral non linearity (difference
between measured value at Code i
and the value at Code i on a line
drawn between Code 0 and last Code
1023)
DAC electrical specifications
DAC characteristics
Parameter
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Doc ID 16455 Rev 6
2.4
2.4
0
5
0.2
Min
0.5
Typ
3.6
3.6
0
15
50
V
0.2
V
– 1LSB
220
380
480
±0.5
±2
±1
±4
Max
DDA
REF+
(1)
V
V
V
pF
V
V
mV
V
µA
µA
µA
LSB
LSB
LSB
LSB
Unit
V
V
When the buffer is OFF, the
Minimum resistive load between
DAC_OUT and V
1% accuracy is 1.5 MΩ
Maximum capacitive load at
DAC_OUT pin (when the buffer
is ON).
It gives the maximum output
excursion of the DAC.
It corresponds to 12-bit input
code (0x0E0) to (0xF1C) at
V
(0xEAB) at V
It gives the maximum output
excursion of the DAC.
With no load, worst code
(0xF1C) at V
terms of DC consumption on the
inputs
With no load, middle code
(0x800) on the inputs
With no load, worst code
(0xF1C) at V
terms of DC consumption on the
inputs
Given for the DAC in 10-bit
configuration
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit
configuration
Given for the DAC in 12-bit
configuration
REF+
DDA
REF+
must always be below
= 3.6 V and (0x155) and
Comments
REF+
REF+
REF+
SS
= 3.6 V in
= 3.6 V in
= 2.4 V
to have a

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