PIC16F721-I/ML Microchip Technology, PIC16F721-I/ML Datasheet

PIC16F721-I/ML

Manufacturer Part Number

PIC16F721-I/ML

Description

MCU PIC 4K FLASH 20-QFN

Manufacturer

Microchip Technology

Series

PIC® XLP™ 16Fr

Datasheets

1.PIC16F722-ISS.pdf (8 pages)

2.PIC16LF720-ISS.pdf (244 pages)

3.PIC16F720-ISO.pdf (36 pages)

4.PIC16F720-ISO.pdf (8 pages)

5.PIC16F721-IML.pdf (6 pages)

Specifications of PIC16F721-I/ML

Core Size

8-Bit

Program Memory Size

7KB (4K x 14)

Peripherals

Brown-out Detect/Reset, POR, PWM, WDT

Core Processor

PIC

Speed

16MHz

Connectivity

I²C, SPI, UART/USART

Number Of I /o

Program Memory Type

FLASH

Ram Size

256 x 8

Voltage - Supply (vcc/vdd)

1.8 V ~ 5.5 V

Data Converters

A/D 12x8b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

20-VFQFN Exposed Pad

Controller Family/series

PIC16F

No. Of I/o's

Ram Memory Size

256Byte

Cpu Speed

16MHz

No. Of Timers

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Eeprom Size

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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The PIC16(L)F720/721 family devices that you have

received conform functionally to the current Device Data

Sheet (DS41341E), except for the anomalies described

in this document.

The silicon issues discussed in the following pages are

for silicon revisions with the Device and Revision IDs

listed in

Table

The errata described in this document will be addressed

in future revisions of the PIC16(L)F720/721 silicon.

Data Sheet clarifications and corrections start on page 4,

following the discussion of silicon issues.

The silicon revision level can be identified using the

current version of MPLAB

programmers, debuggers, and emulation tools, which

are available at the Microchip corporate web site

(www.microchip.com).

TABLE 1:

 2011 Microchip Technology Inc.

PIC16F720

PIC16LF720

PIC16F721

PIC16LF721

Note 1:

Note:

Part Number

Table

The Device ID is located at 2006h. The 5 Least Significant bits comprise the revision ID.

Refer to the “PIC16F720/721 Memory Programming Specification” (DS41409) for detailed information on

Device and Revision IDs for your specific device.

This document summarizes all silicon

errata issues from all revisions of silicon,

previous as well as current. Only the

issues indicated in the last column of

Table 2

revision (A3).

1. The silicon issues are summarized in

SILICON DEVREV VALUES

Silicon Errata and Data Sheet Clarification

apply to the current silicon

IDE and Microchip’s

PIC16(L)F720/721 Family

01 1100 000x xxxx

01 1100 010x xxxx

01 1100 001x xxxx

01 1100 011x xxxx

Device ID

(1)

For example, to identify the silicon revision level using

MPLAB IDE in conjunction with MPLAB ICD 2 or

PICkit™ 3:

The DEVREV values for the various PIC16(L)F720/721

silicon revisions are shown in

Note:

PIC16(L)F720/721

Using the appropriate interface, connect the

device to the MPLAB ICD 2 programmer/

debugger or PICkit™ 3.

From the main menu in MPLAB IDE, select

Configure>Select Device, and then select the

target part number in the dialog box.

Select

(Debugger>Select Tool).

Perform a “Connect” operation to the device

(Debugger>Connect).

development tool used, the part number and

Device Revision ID value appear in the Output

window.

If you are unable to extract the silicon

revision level, please contact your local

Microchip sales office for assistance.

the

Revision ID for Silicon Revision

MPLAB

Depending

Table

0x3

hardware

DS80521A-page 1

tool

the

(2)

Related parts for PIC16F721-I/ML

PIC16F721-I/ML Summary of contents

Page 1

... TABLE 1: SILICON DEVREV VALUES Part Number PIC16F720 PIC16LF720 PIC16F721 PIC16LF721 Note 1: The Device ID is located at 2006h. The 5 Least Significant bits comprise the revision ID. 2: Refer to the “PIC16F720/721 Memory Programming Specification” (DS41409) for detailed information on Device and Revision IDs for your specific device. ...

Page 2

... Item Module Feature Number AUSART OERR Flag 1.1 AUSART Interrupts 1.2 Interrupts Stack Push 2. DS80521A-page 2 Issue Summary OERR flag not clearing. Starting the Interrupt Service Routine. Interrupt logic incorrectly pushes two addresses to the stack. (1) Affected Revisions  2011 Microchip Technology Inc. ...

Page 3

... Follow the SLEEP instruction with two NOP instructions or two instructions desired to be executed before the ISR begins. Affected Silicon Revisions A3 X  2011 Microchip Technology Inc. PIC16(L)F720/721 2. Module: Interrupts The interrupt addresses to the stack when vectoring to the interrupt vector. Specifically, the interrupt vector ...

Page 4

... PIC16(L)F720/721 Data Sheet Clarifications None. DS80521A-page 4  2011 Microchip Technology Inc. ...

Page 5

... APPENDIX A: DOCUMENT REVISION HISTORY Rev. A Document (02/2011) Original release of this document.  2011 Microchip Technology Inc. PIC16(L)F720/721 DS80521A-page 5 ...

Page 6

... PIC16(L)F720/721 NOTES: DS80521A-page 6  2011 Microchip Technology Inc. ...

Page 7

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 8

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350  2011 Microchip Technology Inc. 02/18/11 ...

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