LFE2M20E-6FN484C Lattice, LFE2M20E-6FN484C Datasheet - Page 83

FPGA - Field Programmable Gate Array 19K LUTs 304 I/O SERDES DSP -6

LFE2M20E-6FN484C

Manufacturer Part Number
LFE2M20E-6FN484C
Description
FPGA - Field Programmable Gate Array 19K LUTs 304 I/O SERDES DSP -6
Manufacturer
Lattice
Datasheet

Specifications of LFE2M20E-6FN484C

Number Of Macrocells
19000
Maximum Operating Frequency
357 MHz
Number Of Programmable I/os
304
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE2M20E-6FN484C
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFE2M20E-6FN484C
Manufacturer:
LATTICE
Quantity:
350
Part Number:
LFE2M20E-6FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFE2M20E-6FN484C
Manufacturer:
ALTERA
0
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
LATTICE
Quantity:
11
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
ALTERA
0
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
Figure 3-11. Write Through (SP Read/Write on Port A, Input Registers Only)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
CLKA
WEA
DOA
CSA
ADA
DIA
Data from Prev Read
or Write
t
SU
A0
D0
t
H
t
ACCESS
A1
D1
D0
t
ACCESS
3-31
D2
D1
t
ACCESS
Three consecutive writes to A0
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
D3
D2
A0
D3
D4
t
ACCESS
D4

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