LFE2M20E-6FN484C Lattice, LFE2M20E-6FN484C Datasheet - Page 16

FPGA - Field Programmable Gate Array 19K LUTs 304 I/O SERDES DSP -6

LFE2M20E-6FN484C

Manufacturer Part Number
LFE2M20E-6FN484C
Description
FPGA - Field Programmable Gate Array 19K LUTs 304 I/O SERDES DSP -6
Manufacturer
Lattice
Datasheet

Specifications of LFE2M20E-6FN484C

Number Of Macrocells
19000
Maximum Operating Frequency
357 MHz
Number Of Programmable I/os
304
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE2M20E-6FN484C
Manufacturer:
Lattice
Quantity:
135
Part Number:
LFE2M20E-6FN484C
Manufacturer:
LATTICE
Quantity:
350
Part Number:
LFE2M20E-6FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFE2M20E-6FN484C
Manufacturer:
ALTERA
0
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
LATTICE
Quantity:
11
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
ALTERA
0
Part Number:
LFE2M20E-6FN484C-5I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
Secondary Clock/Control Sources
LatticeECP2/M devices derive secondary clocks (SC0 through SC7) from eight dedicated clock input pads and the
rest from routing. Figure 2-11 shows the secondary clock sources.
Figure 2-11. Secondary Clock Sources
Clock Input
Clock Input
From Routing
From Routing
From Routing
From Routing
Routing
Routing
From
From
Routing
Routing
From
From
Secondary Clock Sources
Clock
Clock
Input
Input
2-13
Clock
Clock
Input
Input
Routing
Routing
From
From
LatticeECP2/M Family Data Sheet
Routing
Routing
From
From
From Routing
From Routing
From Routing
From Routing
Clock Input
Clock Input
Architecture

Related parts for LFE2M20E-6FN484C