ispPAC-POWR1014-01TN48I Lattice, ispPAC-POWR1014-01TN48I Datasheet - Page 19

• Manufacturer Part Number: ispPAC-POWR1014-01TN48I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
• Manufacturer: Lattice
• Type: Power Supply Sequencer and Monitorr
• Series: ispPAC®r

Specifications of ispPAC-POWR1014-01TN48I

• Internal Hysteresis: Yes
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Output Type: Open Collector / Drain
• Number Of Voltages Monitored: 10
• Monitored Voltage: Adj V
• Undervoltage Threshold: Adj
• Overvoltage Threshold: Adj
• Manual Reset: No
• Watchdog: No
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 20 mA
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-48
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 20mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
VMON Voltage Measurement with the On-chip Analog to Digital Converter 
(ADC, ispPAC-POWR1014A Only)
The ispPAC-POWR1014A has an on-chip analog to digital converter that can be used for measuring the voltages at
the VMON inputs.
Figure 2-9. ADC Monitoring VMON1 to VMON10
Figure 2-9 shows the ADC circuit arrangement within the ispPAC-POWR1014A device. The ADC can measure all
analog input voltages through the multiplexer, ADC MUX. The programmable attenuator between the ADC mux
and the ADC can be configured as divided-by-3 or divided-by-1 (no attenuation). The divided-by-3 setting is used to
measure voltages from 0V to 6V range and divided-by-1 setting is used to measure the voltages from 0V to 2V
range.
A microcontroller can place a request for any VMON voltage measurement at any time through the I
(ispPAC-POWR1014A only). Upon the receipt of an ADCMUX selection command, the ADC will be connected to
the selected VMON through the ADC MUX. The ADC output is then latched into the I
tents of the ADC interface register can be read out from the I
Calculation
The algorithm to convert the ADC code to the corresponding voltage takes into consideration the attenuation bit
value. In other words, if the attenuation bit is set, then the 10-bit ADC result is automatically multiplied by 3 to cal-
culate the actual voltage at that VMON input. Thus, the I
ing formula can always be used to calculate the actual voltage from the ADC code.
Voltage at the VMONx Pins
2
Note: ADC_VALUE_HIGH (8 bits), ADC_VALUE_LOW (4 bits) read from I
VMON = I
VMON10
VCCINP
1. Can be accessed through JTAG port.
VMON1
VMON2
VMON3
VDDA
2
C Readout Register (12 bits
From I
(ispPAC-POWR1014A Only)
MUX
ADC
4
2
C ADC MUX Register
Programmable Analog
5
Attenuator
÷3 / ÷1
1
2
, converted to decimal) * 2mV
1
VREF- 2.048V
2-19
ADC
Internal
2
C readout register is 12 bits instead of 10 bits. The follow-
2
C/JTAG port (ispPAC-POWR1014A only).
2
C or JTAG port.
10
Digital Multiplier
Programmable
x3 / x1
ispPAC-POWR1014/A Data Sheet
12
2
C readout registers.The con-
(ispPAC-POWR1014A Only)
To I
2
C Readout Register
2
C/JTAGport
1