MAX5974AETE+ Maxim Integrated Products, MAX5974AETE+ Datasheet - Page 19

Current Mode PWM Controllers ACTIVE-CLAMPED CUR MODE PWM CONTLR

MAX5974AETE+

Manufacturer Part Number
MAX5974AETE+
Description
Current Mode PWM Controllers ACTIVE-CLAMPED CUR MODE PWM CONTLR
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5974AETE+

Duty Cycle (max)
82 %
Mounting Style
SMD/SMT
Switching Frequency
600 KHz
Operating Supply Voltage
12 V to 21 V
Supply Current
1.8 mA
Maximum Operating Temperature
+ 85 C
Fall Time
14 ns
Minimum Operating Temperature
- 40 C
Rise Time
27 ns
Package / Case
TQFN-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The frequency foldback threshold can be programmed
from 0 to 20% of the full load current using a resistor from
FFB to GND.
When V
the switching frequency to 1/2 the original value to
reduce switching losses and increase the converter effi-
ciency. Calculate the value of R
where R
I
triggers frequency foldback, R
sense resistor connected between CS and PGND, and
I
The maximum duty cycle is determined by the lowest
of three voltages: 2V, the voltage at SS (V
voltage (2.43V - V
calculated as:
where V
By connecting a resistor between SS and ground, the
voltage at SS can be made to be lower than 2V. V
calculated as follows:
where R
GND, and I
(10FA typ).
To set D
a resistive divider between the supply voltage, DCLMP,
and GND as shown in the Typical Application Circuits.
This feed-forward duty-cycle clamp ensures that the
external n-channel MOSFET is not stressed during sup-
ply transients. V
LOAD(LIGHT)
FFB
is the current sourced from FFB to R
Frequency Foldback for High-Efficiency
CSAVG
MIN
MAX
SS
FFB
SS-CH
R
is the resistor connected between SS and
= minimum (2V, V
using supply voltage feed-forward, connect
FFB
is the resistor between FFB and GND,
is the current at light-load conditions that
falls below V
DCLMP
=
is the current sourced from SS to R
V
DCLMP
10 I
SS
D
MAX
×
=
is calculated as follows:
LOAD(LIGHT)
R
). The maximum duty cycle is
SS
=
FFB
Light-Load Operation
2.43V
I
Duty-Cycle Clamping
×
V
FFB
SS
MIN
I
Active-Clamped, Spread-Spectrum,
SS-CH
FFB
CS
, the device folds back
, 2.43V - V
as follows:
is the value of the
×
R
CS
FFB
Current-Mode PWM Controllers
DCLMP
SS
(30FA typ).
), and the
DCLMP
).
SS
SS
SS
is
where R
values shown in the Typical Application Circuits and V
is the input supply voltage.
The internal oscillator can be synchronized to an external
clock by applying the clock to DITHER/SYNC directly. The
external clock frequency can be set anywhere between
1.1x to 2x the internal clock frequency.
Using an external clock increases the maximum duty
cycle by a factor equal to f
be accounted for in setting the maximum duty cycle
using any of the methods described in the Duty-Cycle
Clamping section. The formula below shows how the
maximum duty cycle is affected by the external clock
frequency:
where V
section, f
resistor connected between RT and GND, and f
the external clock frequency.
The switching frequency of the converter can be dith-
ered in a range of Q10% by connecting a capacitor from
DITHER/SYNC to GND, and a resistor from DITHER to
RT as shown in the Typical Application Circuits. This
results in lower EMI.
A current source at DITHER/SYNC charges the capaci-
tor C
it discharges C
and discharging of the capacitor generates a triangular
waveform on DITHER/SYNC with peak levels at 0.4V and
2V and a frequency that is equal to:
DITHER
DCLMP1
MIN
SW
V
DCLMP
to 2V at 50FA. Upon reaching this trip point,
is described in the Duty-Cycle Clamping
Spectrum Applications (Low EMI)
is the switching frequency as set by the
Frequency Dithering for Spread-
DITHER
D
f
and R
TRI
MAX
=
R
=
DCLMP1
Oscillator Synchronization
C
=
DCLMP2
to 0.4V at 50FA. The charging
DITHER
2.43V
V
R
MIN
SYNC
DCLMP2
50 A
+
µ
×
R
are the resistive divider
/f
×
f
DCLMP2
SW
SYNC
3.2V
f
SW
. This factor should
×
V
S
SYNC
19
is
S

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