MAX5974CETE+ Maxim Integrated Products, MAX5974CETE+ Datasheet - Page 20

• Manufacturer Part Number: MAX5974CETE+
• Description: Current Mode PWM Controllers ACTIVE-CLAMPED CUR MODE PWM CONTLR
• Manufacturer: Maxim Integrated Products

Specifications of MAX5974CETE+

• Duty Cycle (max): 82 %
• Mounting Style: SMD/SMT
• Switching Frequency: 600 KHz
• Operating Supply Voltage: 12 V to 21 V
• Supply Current: 1.8 mA
• Maximum Operating Temperature: + 85 C
• Fall Time: 14 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 27 ns
• Package / Case: TQFN-16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Typically, f
R
mines the amount of dither as follows:
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting R
to 10 x R
The device generates a current ramp at CSSC such that
its peak is 50FA at 80% duty cycle of the oscillator. An
external resistor connected from CSSC to the CS then
converts this current ramp into programmable slope-
compensation amplitude, which is added to the current-
sense signal for stability of the peak current-mode
control loop. The ramp rate of the slope compensation
signal is given by:
where m is the ramp rate of the slope-compensation
signal, R
between CSSC and CS used to program the ramp rate,
and f
The MAX5974A/MAX5974B include an internal error
amplifier with a sample-and-hold input. The feedback
input of the MAX5974C/MAX5974D is continuously con-
nected. The noninverting input of the error amplifier is
connected to the internal reference and feedback is
provided at the inverting input. High open-loop gain and
unity-gain bandwidth allow good closed-loop bandwidth
and transient response. Calculate the power-supply out-
put voltage using the following equation:
where V
and V
amplifier’s noninverting input is internally connected to
a soft-start circuit that gradually increases the reference
voltage during startup. This forces the output voltage to
come up in an orderly and well-defined manner under all
load conditions.
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
20
DITHER
SW
REF
is the switching frequency.
RT
REF
CSSC
connected from DITHER/SYNC to RT deter-
Programmable Slope Compensation
= 1.215V for the MAX5974C/MAX5974D. The
TRI
generates Q10% dither.
V
= 1.52V for the MAX5974A/MAX5974B
should be set close to 1kHz. The resistor
OUT
%DITHER
m
is the value of the resistor connected
=
R
=
CSSC
V
REF
=
×
4
3 R
×
80%
50 A f
R
×
FB1
µ ×
DITHER
R
R
FB2
+
RT
R
SW
Error Amplifier
FB2
DITHER
The bypass capacitor at IN, C
immediately after the devices wake up (see the Typical
Application Circuits). Large values of C
the startup time, but also supply gate charge for more
cycles during initial startup. If the value of C
small, V
enough time to switch and build up sufficient voltage
across the tertiary output (MAX5974C/MAX5974D) or
coupled inductor output (MAX5974A/MAX5974B), which
powers the device. The device goes back into UVLO
and does not start. Use a low-leakage capacitor for C
Typically, offline power supplies keep startup times to
less than 500ms even in low-line conditions (85V AC
input for universal offline or 36V DC for telecom applica-
tions). Size the startup resistor, R
maximum startup bias of the device (150FA) and the
charging current for C
within the desired 500ms time period. C
enough charge to deliver current to the device for at
least the soft-start time (t
approximate amount of capacitance required, use the
following formula:
where I
after startup, Q
n-channel and p-channel FETs, f
ing frequency, V
(13V typ), and t
culated as follows:
where V
the application (36V for telecom), V
strap UVLO wake-up level (20V), and I
supply current at startup (150FA max).
Choose a higher value for R
above if a longer startup time can be tolerated in order
to minimize power loss on this resistor.
IN
IN
S(MIN)
drops below 7V because NDRV does not have
is the ICs’ internal supply current (1.8mA)
is the minimum input supply voltage for
SS
Applications Information
R
GTOT
HYST
IN
C
is the soft-start time. R
Startup Time Considerations
IN
I
≅
G
V
=
is the bootstrap UVLO hysteresis
is the total gate charge for the
IN
=
S(MIN)
(I
SS
Q
. C
IN
GTOT SW
) set by C
I
V
IN
START
+
IN
HYST
I )(t
G
−
must be charged to 20V
than the one calculated
f
V
INUVR
SW
IN
SS
IN
, to supply both the
SS
, supplies current
)
INUVR
is the ICs’ switch-
. To calculate the
START
IN
IN
IN
is the boot-
is then cal-
must store
IN
is the IN
increase
is too
IN
.