AT24C64D-XHM-B Atmel, AT24C64D-XHM-B Datasheet - Page 6

• Manufacturer Part Number: AT24C64D-XHM-B
• Description: EEPROM SERIAL EEPROM 64K 2-WIRE 1.7V
• Manufacturer: Atmel

Specifications of AT24C64D-XHM-B

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.
6
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (refer to
high periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any
other command (refer to
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power mode (refer to
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
STANDBY MODE: The Atmel
SOFTWARE RESET: After an interruption in protocol, power loss or system reset, and 2-wire part can be protocol
reset by following these steps:
The device is ready for next communication after above steps have been completed.
Figure 4-1.
• Upon power-up
• After the receipt of the Stop bit and the completion of any internal operations.
• Create a start bit condition
• Clock nine cycles
• Create another start bit followed by stop bit condition as shown below.
Atmel AT24C32D/64D
SDA
SCL
Software Reset
Start bit
“Start and Stop Definition”
®
1
AT24C32D/64D features a low power standby mode which is enabled:
2
Dummy Clock Cycles
3
diagram).
“Data Validity”
8
“Start and Stop Definition”
diagram). Data changes during SCL
9
Start bit
8717B–SEEPR–6/10
diagram).
Stop bit