AT24C64D-XHM-B Atmel, AT24C64D-XHM-B Datasheet - Page 10

• Manufacturer Part Number: AT24C64D-XHM-B
• Description: EEPROM SERIAL EEPROM 64K 2-WIRE 1.7V
• Manufacturer: Atmel

Specifications of AT24C64D-XHM-B

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.
10
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in
the device address word is set to one. There are three read operations: current address read, random address
read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during
the last read or write operation, incremented by one. This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during read is from the last byte of the last memory page, to the
first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM,
the current address data word is serially clocked out. The microcontroller does not respond with an input zero but
does generate a following stop condition (see
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once
the device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another start condition. The microcontroller now initiates a current address read by
sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and
serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following
stop condition (see
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read.
After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives
an acknowledge, it will continue to increment the data word address and serially clock out sequential data words.
When the memory address limit is reached, the data word address will “roll over” and the sequential read will
continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but
does generate a following stop condition (see
Figure 7-1.
Figure 7-2.
Notes:
Atmel AT24C32D/64D
SDA LINE
MSB
1
0
1. * = DON'T CARE bits
2. t = DON'T Care bit for Atmel AT24C32D
1
R
S
T
A
T
Device Address
Byte Write
0
M
S
B
ADDRESS
A
DEVICE
2
Figure 7-5 on page
A
1
A
0
S
B
L
R/W
LSB
W
W
R
R
E
T
I
/
C
A
K
WORD ADDRESS
FIRST
M
11).
t
S
B
Figure 7-4 on page
Figure 7-6 on page
C
K
A
WORD ADDRESS
SECOND
S
B
L
11).
11).
C
A
K
DATA
C
A
K
S
O
T
P
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