IES5515D Hendon Semiconductors, IES5515D Datasheet
IES5515D
Specifications of IES5515D
Related parts for IES5515D
IES5515D Summary of contents
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... GND Fig.1 Block diagram 2 (1) I C-bus is a trademark of NXP B.V. © 2008 Hendon Semiconductors Pty. Ltd. , all rights reserved. 2008 Feb 26, Revision 0.7 3 GENERAL DESCRIPTION The IES5505 and IES5515 are monolithic CMOS integrated circuits for bus buffering in applications including I based on similar principles. ...
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PINNING INFORMATION 5.1 Pinning layout SCL OUT IES5505 3 SCL IN IES5515 4 GND Fig.2 Pinning diagram (SO8 / MSOP8) 6 FUNCTIONAL DESCRIPTION 6 GND - DC supply pins DD The power supply voltage ...
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... IES5515 D MSOP-8L micro small outline package; 8 leads; body width 3.0 mm Other package options are available - contact Hendon Semiconductors for details. For more information on packages, please refer to the document “Integrated Circuit Packaging and Soldering Information” on the Hendon Semiconductors web site. 8 ESD CAUTION Electrostatic Discharge (ESD) sensitive device ...
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... Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given advisory and does not form part of the specification. 11 COMPANY INFORMATION HENDON SEMICONDUCTORS PTY. LTD. ABN 17 080 879 616 Postal address: Hendon Semiconductors PO Box 2226 ...
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... DISCLAIMER Hendon Semiconductors Pty. Ltd. ABN 17 080 879 616 (“Hendon”) reserves the right to make changes to both its products and product data without notice. Hendon makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Hendon assume any liability arising out of the use or application of any Hendon product. Hendon specifically disclaims any and all liability, including without limitation incidental or consequential damages ...