73S8024RN-IM/F Maxim Integrated Products, 73S8024RN-IM/F Datasheet - Page 11

I/O Controller Interface IC ISO 7816 Electrical Interface IC

73S8024RN-IM/F

Manufacturer Part Number
73S8024RN-IM/F
Description
I/O Controller Interface IC ISO 7816 Electrical Interface IC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 73S8024RN-IM/F

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS_8024RN_020
The following steps show the activation sequence and the timing of the card control signals when the
system controller pulls the CMDVCC low while the RSTIN is high:
Rev. 1.9
CMDVCC is set low.
Next, the internal V
the voltage V
the system controller, and the power V
Due to the fall of RSTIN at (t
CLK is applied to the card at the end of (t
RST is to be a copy of RSTIN after (t
not set RST high until 42000 clock cycles after the start of CLK.
CMDVCC
RSTIN
VCC
Figure 3: Activation Sequence – RSTIN High When CMDVCCB Goes Low
RST
CLK
I/O
t
t
t
t
1
2
3
4
CC
= 0.510 ms (timing by 1.5MHz internal Oscillator)
= 1.5µs, I/O goes to reception state
= > 0.5µs, CLK active
≥ 42000 card clock cycles. Time for RST to become the copy of RSTIN
to the card becomes valid during this time. If not, OFF goes low to report a fault to
CC
control circuit checks the presence of V
2
), turn I/O (AUX1, AUX2) to reception mode.
t
1
4
). RSTIN may be set high before t
CC
3
to the card is shut down.
), after I/O is in reception mode.
t
2
t
3
CC
at the end of t
4
t
4
, however the sequencer will
73S8024RN Data Sheet
1
. In normal operation,
11

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