TSL2581CS TAOS, TSL2581CS Datasheet - Page 11

• Manufacturer Part Number: TSL2581CS
• Description: Light to Digital Converters Light to Digital 30x Sensitivity
• Manufacturer: TAOS

Specifications of TSL2581CS

• Data Bus Width: 16 bit
• Peak Wavelength: 625 nm, 850 nm
• Maximum Operating Frequency: 795 KHz
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Current: 175 uA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 30 C
• Interface Type: I2C
• Maximum Fall Time: 300 ns
• Maximum Rise Time: 300 ns
• Mounting Style: SMD/SMT
• Resolution: 16 bit
• Package / Case: DFN-6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NOTE: The I
NOTE: The I
Register Set
The LUMENOLOGY r Company
1
S
1
S
The TSL258x is controlled and monitored by sixteen registers and a command register accessed through the
serial interface. These registers provide for a variety of control functions and can be read to determine results
of the ADC conversions. The register set is summarized in Table 2.
The mechanics of accessing a specific register depends on the specific SMB protocol used. See the section
on SMBus protocols, above. In general, the COMMAND register is written first to specify the specific
control/status register for following read/write operations.
Slave Address
Slave Address
Stop condition. See the Command Register on page 12 for additional information regarding the Block Read/Write protocol.
a Stop Condition. See the Command Register on page 13 for additional information regarding the Block Read/Write protocol.
ADDRESS
2
2
C write protocol does not use the Byte Count packet, and the Master will continue sending Data Bytes until the Master initiates a
C read protocol does not use the Byte Count packet, and the Master will continue receiving Data Bytes until the Master initiates
7
7
00h
01h
02h
03h
04h
05h
06h
07h
12h
13h
14h
15h
16h
17h
18h
19h
−−
Figure 14. SMBus Block Read or I
Wr
Wr
1
1
RESISTER NAME
A
A
INTERRUPT
TIMERHIGH
DATA0HIGH
DATA1HIGH
CONSTANT
DATA0LOW
DATA1LOW
TIMERLOW
1
1
COMMAND
CONTROL
THLHIGH
THLHIGH
THLLOW
THLLOW
ANALOG
TIMING
Figure 13. SMBus Block Write or I
ID
Command Code
Command Code
Data Byte 1
8
8
r
8
Specifies register address
Control of basic functions
Integration time/gain control
Interrupt control
Low byte of low interrupt threshold
High byte of low interrupt threshold
Low byte of high interrupt threshold
High byte of high interrupt threshold
Analog control register
Part number / Rev ID
Number 4 (for SMBus block reads)
ADC channel 0 LOW data register
ADC channel 0 HIGH data register
ADC channel 1 LOW data register
ADC channel 1 HIGH data register
Manual integration timer LOW register
Manual integration timer HIGH register
Table 2. Register Address
www.taosinc.com
A
A
1
1
A
1
Sr
1
2
C Read (Combined Format) Protocols
Byte Count = N
Slave Address
REGISTER FUNCTION
Data Byte 2
Data Byte 2
8
7
2
8
C Write Protocols
8
Rd
LIGHT-TO-DIGITAL CONVERTER
A
1
1
A
A
1
1
r
1
A
...
...
Data Byte 1
Byte Count = N
8
8
Data Byte N
Data Byte N
TSL2580, TSL2581
Copyright E 2010, TAOS Inc.
TAOS098 − MARCH 2010
8
8
A
1
R/W
R/W
R/W
1
A
W
R
R
...
...
1
A
1
A
1
1
1
P
P
11