BH1715FVC-TR Rohm Semiconductor, BH1715FVC-TR Datasheet - Page 14

• Manufacturer Part Number: BH1715FVC-TR
• Description: Industrial Optical Sensors Ambient Light Sensor Digital 16Bit Serial
• Manufacturer: Rohm Semiconductor
• Type: Ambient Light Sensor with Digital Outputr
• Series: -r

Specifications of BH1715FVC-TR

• Product: Ambient Light Sensor
• Ic Function: Light To Digital Output Sensor
• Supply Voltage Range: 2.4V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SOP
• No. Of Pins: 6
• Supply Voltage Max: 3.6V
• Wavelength: 560nm
• Output Type: I²C™
• Package / Case: 6-WSOF Exposed Pad
• Interface Type: Serial, I2C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

● Cautions on use
1) Absolute Maximum Ratings
2) GND voltage
3) Short circuit between terminals and erroneous mounting
4) Operation in strong electromagnetic field
5) Inspection with set PCB
6) Input terminals
7) Thermal design
8) Treatment of package
9) Rush current
10) The exposed central pad on the back side of the package
An excess in the absolute maximum ratings, such as supply voltage ( Vmax ), temperature range of operating
conditions ( Topr ), etc., can break down devices, thus making impossible to identify breaking mode such as a short
circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration
should be given to take physical safety measures including the use of fuses, etc.
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual
electric transient.
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous
mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between
terminals or between the terminal and the power supply or the GND terminal, the ICs can break down.
Be noted that using ICs in the strong electromagnetic field can malfunction them.
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer
stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or
dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then
mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then
dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly
process and pay thorough attention to the transportation and the storage of the set PCB.
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of
the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then
breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals; such as to
apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate.
Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In
addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power
supply voltage or within the guaranteed value of electrical characteristics.
Perform thermal design in which there are adequate margins by taking into account the power dissipation ( Pd ) in
actual states of use.
Dusts or scratch on the photo detector may affect the optical characteristics. Please handle it with care.
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current
may flow instantaneously. Therefore, give special consideration to power coupling capacitance, power wiring, width
of GND wiring, and routing of connections.
There is an exposed central pad on the back side of the package. But please do it non connection. ( Don't solder,
and don't do electrical connection ) Please mount by Footprint dimensions described in the Jisso Information for
WSOF6. This pad is GND level, therefore there is a possibility that LSI malfunctions and heavy-current is
generated.
14 / 15