WJLXT971ALC.A4-857344 Cortina Systems Inc, WJLXT971ALC.A4-857344 Datasheet - Page 6

• Manufacturer Part Number: WJLXT971ALC.A4-857344
• Description: TXRX ETH 10/100 SGL PORT 64-LQFP
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT971ALC.A4-857344

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1008-1040-2

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
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Cortina Systems
Related Documents ....................................................................................................................... 10
PHY Signal Types ......................................................................................................................... 12
LQFP Numeric Pin List .................................................................................................................. 14
PHY Signal Types ......................................................................................................................... 17
MII Data Interface Signal Descriptions .......................................................................................... 18
MII Controller Interface Signal Descriptions .................................................................................. 19
Network Interface Signal Descriptions........................................................................................... 20
Standard Bus and Interface Signal Descriptions ........................................................................... 20
Configuration and LED Driver Signal Descriptions ........................................................................ 20
Power, Ground, No-Connect Signal Descriptions ......................................................................... 22
JTAG Test Signal Descriptions...................................................................................................... 22
Pin Types and Modes.................................................................................................................... 23
Hardware Configuration Settings................................................................................................... 33
Carrier Sense, Loopback, and Collision Conditions ...................................................................... 40
4B/5B Coding ................................................................................................................................ 46
Valid JTAG Instructions ................................................................................................................. 53
BSR Mode of Operation ................................................................................................................ 53
Device ID Register......................................................................................................................... 53
Magnetics Requirements............................................................................................................... 54
I/O Pin Comparison of NIC and Switch RJ-45 Setups................................................................... 54
Absolute Maximum Ratings ...........................................................................................................61
Recommended Operating Conditions ........................................................................................... 61
Digital I/O Characteristics (Except for MII, XI/XO, and LED/CFG Pins) ........................................ 62
Digital I/O Characteristics
I/O Characteristics - REFCLK/XI and XO Pins .............................................................................. 63
I/O Characteristics - LED/CFG Pins ..............................................................................................63
I/O Characteristics – SD/TP_L Pin ................................................................................................ 63
100BASE-TX PHY Characteristics ................................................................................................ 63
100BASE-FX PHY Characteristics ................................................................................................ 64
10BASE-T PHY Characteristics .................................................................................................... 64
10BASE-T Link Integrity Timing Characteristics............................................................................ 65
Thermal Characteristics................................................................................................................. 65
100BASE-TX Receive Timing Parameters - 4B Mode .................................................................. 66
100BASE-TX Transmit Timing Parameters - 4B Mode .................................................................67
100BASE-FX Receive Timing Parameters .................................................................................... 68
100BASE-FX Transmit Timing Parameters ................................................................................... 69
10BASE-T Receive Timing Parameters ........................................................................................ 71
10BASE-T Transmit Timing Parameters ....................................................................................... 72
10BASE-T Jabber and Unjabber Timing ....................................................................................... 73
PHY 10BASE-T SQE (Heartbeat) Timing...................................................................................... 73
Auto-Negotiation and Fast Link Pulse Timing Parameters ............................................................ 74
MDIO Timing ................................................................................................................................. 75
Power-Up Timing ........................................................................................................................... 76
RESET_L Pulse Width and Recovery Timing ............................................................................... 77
Register Set for IEEE Base Registers ........................................................................................... 78
Control Register - Address 0, Hex 0 ..............................................................................................79
MII Status Register #1 - Address 1, Hex 1 .................................................................................... 80
PHY Identification Register 1 - Address 2, Hex 2 .......................................................................... 81
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
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- MII Pins ............................................................................................ 62
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