KSZ8841-16MBLI Micrel Inc, KSZ8841-16MBLI Datasheet - Page 67

IC MAC CTRLR 8/16BIT 128LQFP

KSZ8841-16MBLI

Manufacturer Part Number
KSZ8841-16MBLI
Description
IC MAC CTRLR 8/16BIT 128LQFP
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8841-16MBLI

Controller Type
Ethernet Controller, MAC
Interface
Bus
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8841-16MBLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Bank 17 QMU Data Register Low (0x08): QDRL
This register QDRL(0x08-0x09) contains the Low data word presently addressed by the pointer register. Reading maps
from the RXQ, and writing maps to the TXQ.
Bank 17 QMU Data Register High (0x0A): QDRH
This register QDRH(0x0A-0x0B) contains the High data word presently addressed by the pointer register. Reading maps
from the RXQ, and writing maps to the TXQ.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
-
-
Default Value
Default Value
R/W
RW
R/W
RW
Description
QDRL Queue Data Register Low
This register is mapped into two uni-directional buffers for 16-bit buses, and one uni-directional
buffer for 32-bit buses, (TXQ when Write, RXQ when Read) that allow moving words to and
from the KSZ8841M regardless of whether the pointer is even, odd, or Dword aligned. Byte,
word, and Dword access can be mixed on the fly in any order. This register along with DQRH
is mapped into two consecutive word locations for 16-bit buses, or one word location for 32-bit
buses, to facilitate Dword move operations.
Description
QDRL Queue Data Register High
This register is mapped into two uni-directional buffers for 16-bit buses, and one uni-directional
buffer for 32-bit buses, (TXQ when Write, RXQ when Read) that allow moving words to and
from the KSZ8841M regardless of whether the pointer is even, odd, or dword aligned. Byte,
word, and Dword access can be mixed on the fly in any order. This register along with DQRL
is mapped into two consecutive word locations for 16-bit buses, or one word location for 32-bit
buses, to facilitate Dword move operations.
67
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6

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