KSZ8841-16MBLI Micrel Inc, KSZ8841-16MBLI Datasheet - Page 60

• Manufacturer Part Number: KSZ8841-16MBLI
• Description: IC MAC CTRLR 8/16BIT 128LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8841-16MBLI

• Controller Type: Ethernet Controller, MAC
• Interface: Bus
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

Bank 5 Wakeup Frame 1 Byte Mask 2 Register (0x08): WF1BM2
This register contains the next 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 1. Setting bit 15 selects the 48th byte of the Wake up frame 1.
Bank 5 Wakeup Frame 1 Byte Mask 3 Register (0x0A): WF1BM3
This register contains the last 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 1. Setting bit 15 selects the 64th byte of the Wake up frame 1.
Bank 6 Wakeup Frame 2 CRC0 Register (0x00): WF2CRC0
This register contains the expected CRC values of the Wake up frame 2 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bank 6 Wakeup Frame 2 CRC1 Register (0x02): WF2CRC1
This register contains the expected CRC values of the wake-up frame 2 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bank 6 Wakeup Frame 2 Byte Mask 0 Register (0x04): WF2BM0
This register contains the first 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the first byte
of the Wake up frame 2, setting bit 15 selects the 16th byte of the Wake up frame 2.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF1BM2
Wake-up frame 1 Byte Mask 2.
The next 16 bytes mask covering bytes 33 to 48 of a Wake-up frame 1 pattern.
Description
WF1BM3
Wake-up frame 1 Byte Mask 3.
The last 16 bytes mask covering bytes 49 to 64 of a Wake-up frame 1 pattern.
Description
WF2CRC0
Wake-up frame 2 CRC (lower 16 bits).
The expected CRC value of a Wake-up frame 2 pattern.
Description
WF2CRC1
Wake-up frame 2 CRC (upper 16 bits).
The expected CRC value of a Wake-up frame 2 pattern.
Description
WF2BM0
Wake-up frame 2 Byte Mask 0.
The first 16 bytes mask of a Wake-up frame 2 pattern.
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KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6