ATMEGA128A-MNR Atmel, ATMEGA128A-MNR Datasheet - Page 325

• Manufacturer Part Number: ATMEGA128A-MNR
• Description: IC MCU AVR 128K FLASH 64VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Core: AVR8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.7
8151H–AVR–02/11
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega128A Two-wire Serial Interface operation. Other devices connected to the Two-wire
Parallel Programming Characteristics
Serial Bus need only obey the general f
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
Figure 27-3. Two-wire Serial Bus Timing
Figure 27-4. Parallel Programming Timing, Including some General Timing Requirements
Figure 27-5. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
SCL
(DATA, XA0/1, BS1, BS2)
> 100kHz.
SCL
SDA
PAGEL
XTAL1
DATA
BS1
XA0
XA1
The timing requirements shown in
ing operation.
t
SU;STA
Data & Contol
RDY/BSY
PAGEL
XTAL1
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
SCL
WR
requirement.
t
HD;STA
t
of
t
LOW
t
t
BVPH
DVXH
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
t
HIGH
t
Figure 27-4
t
XHXL
PHPL
t
HD;DAT
t
t
t
t
t
XLXH
XLDX
PLBX
XLWL
PLWL
t
LOW
(that is t
t
(HIGH BYTE)
BVWL
LOAD DATA
t
SU;DAT
DVXH
DATA (High Byte)
t
t
WL WH
XLPH
, t
WLRL
LOAD DATA
XHXL
, and t
t
ATmega128A
PLXH
t
WLBX
XLDX
t
SU;STO
LOAD ADDRESS
t
) also apply to load-
r
(LOW BYTE)
ADDR1 (Low Byte)
t
WLRH
t
BUF
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