LPC1224FBD64/201 NXP Semiconductors, LPC1224FBD64/201 Datasheet - Page 16

• Manufacturer Part Number: LPC1224FBD64/201
• Description: MCU 32BIT 32K FLASH 4K 64-LQFP
• Manufacturer: NXP Semiconductors

Specifications of LPC1224FBD64/201

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 45MHz
• Connectivity: I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 55
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5155; LPC1224FBD64/201

NXP Semiconductors
7. Functional description
LPC122X
Objective data sheet
7.1.1 System tick timer
7.1 ARM Cortex-M0 processor
7.2 On-chip flash program memory
7.3 On-chip SRAM
7.4 Memory map
Table 4.
[1]
The ARM Cortex-M0 is a general purpose, 32-bit microprocessor, which offers high
performance and very low power consumption.
The ARM Cortex-M0 includes a System Tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a 10 ms interval.
The LPC122x contain up to 128 kB of on-chip flash memory.
The LPC122x contain a total of up to 8 kB on-chip static RAM memory.
The LPC122x incorporates several distinct memory regions, shown in the following
figures.
program viewpoint following reset. The interrupt vector area supports address remapping.
The AHB peripheral area is 2 megabyte in size, and is divided to allow for up to 128
peripherals. The APB peripheral area is 512 kB in size and is divided to allow for up to 32
peripherals. Each peripheral of either type is allocated 16 kilobytes of space. This allows
simplifying the address decoding for each peripheral.
Peripheral
SWD
Reset
Clockout pin
After reset, the SWD functions are selected by default on pins PIO0_26 and PIO0_25.
Figure 4
Pin multiplexing
All information provided in this document is subject to legal disclaimers.
shows the overall map of the entire address space from the user
Rev. 1.2 — 29 March 2011
Function
SWCLK
SWDIO
RESET
CLKOUT
[1]
[1]
Type
I
I/O
I
O
32-bit ARM Cortex-M0 microcontroller
Available on ports:
PIO0_18
PIO0_25
PIO0_13
PIO0_12
PIO0_26
PIO1_2
-
-
LPC122x
© NXP B.V. 2011. All rights reserved.
-
-
-
-
16 of 60