ATMEGA165PV-8MNR Atmel, ATMEGA165PV-8MNR Datasheet - Page 82

IC MCU AVR 16K 8MHZ 64MLF

ATMEGA165PV-8MNR

Manufacturer Part Number
ATMEGA165PV-8MNR
Description
IC MCU AVR 16K 8MHZ 64MLF
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165PV-8MNR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13. 8-bit Timer/Counter0 with PWM
13.1
13.2
13.2.1
8019K–AVR–11/10
Features
Overview
Registers
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the
Figure 13-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers. Inter-
rupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt
Flag Register (TIFR0). All interrupts are individually masked with the Timer Interrupt Mask Reg-
ister (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
“Register Description” on page
Timer/Counter
TCNTn
OCRn
“Pinout ATmega165P” on page
=
direction
count
clear
BOTTOM
= 0
Control Logic
=
TCCRn
TOP
0xFF
93.
2. CPU accessible I/O Registers, including
clk
Tn
Figure
Generation
Waveform
Clock Select
( From Prescaler )
Detector
13-1. For the actual placement
Edge
ATmega165P
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
T0
).
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