ATMEGA32A-ANR Atmel, ATMEGA32A-ANR Datasheet - Page 344
![IC MCU AVR 32K FLASH 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA32A-ANR
Manufacturer Part Number
ATMEGA32A-ANR
Description
IC MCU AVR 32K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA32A-MU.pdf
(353 pages)
Specifications of ATMEGA32A-ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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33. Errata
33.1
8155C–AVR–02/11
ATmega32A, rev. G to rev. I
•
•
•
•
1. First Analog Comparator conversion may be delayed
2. Interrupts may be lost when writing the timer registers in the asynchronous timer
3. IDCODE masks data from TDI input
4. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request.
If the device is powered by a slow rising V
take longer than expected on some devices.
Problem Fix/Workaround
When the device has been powered or reset, disable then enable theAnalog Comparator
before the first conversion.
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Problem Fix/Workaround
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous
Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx).
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
– If ATmega32A is the only device in the scan chain, the problem is not visible.
– Select the Device ID Register of the ATmega32A by issuing the IDCODE instruction
– If the Device IDs of all devices in the boundary scan chain must be captured
or by entering the Test-Logic-Reset state of the TAP controller to read out the
contents of its Device ID Register and possibly data from succeeding devices of the
scan chain. Issue the BYPASS instruction to the ATmega32A while reading the
Device ID Registers of preceding devices of the boundary scan chain.
simultaneously, the ATmega32A must be the fist device in the chain.
CC
, the first Analog Comparator conversion will
ATmega32A
344
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