M0516ZAN Nuvoton Technology Corporation of America, M0516ZAN Datasheet - Page 300

• Manufacturer Part Number: M0516ZAN
• Description: IC MCU 32BIT 64KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M0516ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

[3]
[1]
[0]
[2]
NuMicro M051
MODEM_IF
RLS_IF
THRE_IF
RDA_IF
MODEM Interrupt Flag (Read Only)
This bit is set when the CTS pin has state change (DCTSF=1). If UA_IER
[MODEM_IEN] is enabled, the Modem interrupt will be generated.
NOTE: Write 1 to clear this bit to zero.
Receive Line Interrupt Flag (Read Only).
This bit is set when the RX receive data have parity error, framing error or break error
(at least one of 3 bits, BIF, FEF and PEF, is set). If UA_IER [RLS_IEN] is enabled,
the RLS interrupt will be generated.
NOTE: When in RS-485 function mode, this field include “receiver detect any
address byte received address byte character (bit9 = ‘1’) bit.
NOTE: Write 1 to clear this bit to zero.
Transmit Holding Register Empty Interrupt Flag (Read Only).
This bit is set when the last data of TX FIFO is transferred to Transmitter Shift
Register. If UA_IER [THRE_IEN] is enabled, the THRE interrupt will be generated.
NOTE: This bit is read only and it will be cleared when writing data into THR (TX
FIFO not empty).
Receive Data Available Interrupt Flag (Read Only).
When the number of bytes in the RX FIFO equals the RFITL then the RDA_IF will be
set. If UA_IER [RDA_IEN] is enabled, the RDA interrupt will be generated.
NOTE: This bit is read only and it will be cleared when the number of unread bytes of
RX FIFO drops below the threshold level (RFITL).
™
Series Technical Reference Manual
- 300 -
Publication Release Date: Sep 14, 2010
Revision V1.2